FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/bsp/rtc/rtc_functions.c @ 162:595192258bc9
gsm-fw: RTC SWE enabled
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Mon, 18 Nov 2013 00:52:05 +0000 |
parents | 98be4841eeb7 |
children |
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161:98be4841eeb7 | 162:595192258bc9 |
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176 static T_RV_RETURN rtc_return_path = {RVF_INVALID_ADDR_ID, NULL}; | 176 static T_RV_RETURN rtc_return_path = {RVF_INVALID_ADDR_ID, NULL}; |
177 static T_RTC_ALARM* rtc_msg_alarm_event = NULL; | 177 static T_RTC_ALARM* rtc_msg_alarm_event = NULL; |
178 | 178 |
179 extern T_RTC_ENV_CTRL_BLK* rtc_env_ctrl_blk; | 179 extern T_RTC_ENV_CTRL_BLK* rtc_env_ctrl_blk; |
180 | 180 |
181 #if CONFIG_GSM | |
181 /* Number of 32 Khz clock */ | 182 /* Number of 32 Khz clock */ |
182 static UINT32 rtc_nb_32khz = 0; | 183 static UINT32 rtc_nb_32khz = 0; |
183 | 184 |
184 /* Number of high frequency clock */ | 185 /* Number of high frequency clock */ |
185 static UINT32 rtc_nb_hf = 0; | 186 static UINT32 rtc_nb_hf = 0; |
187 #endif | |
186 | 188 |
187 static NU_HISR hisr; | 189 static NU_HISR hisr; |
188 char hisrStack[512]; | 190 char hisrStack[512]; |
189 | 191 |
190 // UINT16 toto = 0; tmp | 192 // UINT16 toto = 0; tmp |
338 /* Disable all IT before accessing register */ | 340 /* Disable all IT before accessing register */ |
339 rvf_disable(25); | 341 rvf_disable(25); |
340 | 342 |
341 /* Enable IRQ9 and IRQ10 */ | 343 /* Enable IRQ9 and IRQ10 */ |
342 #if (CHIPSET == 12) | 344 #if (CHIPSET == 12) |
343 F_INTH_ENABLE_ONE_IT(C_INTH_RTC_TIMER_IT); | |
344 F_INTH_ENABLE_ONE_IT(C_INTH_RTC_ALARM_IT); | 345 F_INTH_ENABLE_ONE_IT(C_INTH_RTC_ALARM_IT); |
345 #else | 346 #else |
346 IQ_Unmask(IQ_RTC_TIMER); | |
347 IQ_Unmask(IQ_RTC_ALARM); | 347 IQ_Unmask(IQ_RTC_ALARM); |
348 #endif | 348 #endif |
349 | 349 |
350 /* | |
351 * FreeCalypso change: the RTC periodic interrupt is used in | |
352 * conjunction with the ULPD gauging mechanism, and the latter | |
353 * appears to be controlled by some code in L1-land. | |
354 * Therefore, we are going to enable this interrupt only when | |
355 * building with L1 enabled. | |
356 */ | |
357 #if CONFIG_GSM | |
358 #if (CHIPSET == 12) | |
359 F_INTH_ENABLE_ONE_IT(C_INTH_RTC_TIMER_IT); | |
360 #else | |
361 IQ_Unmask(IQ_RTC_TIMER); | |
362 #endif | |
363 #endif | |
364 | |
350 while (RTC_TEST_BUSY); | 365 while (RTC_TEST_BUSY); |
351 RTC_SET_EVENT_TIMER(RTC_EVERY_MIN); /* Set timer every minute */ | 366 RTC_SET_EVENT_TIMER(RTC_EVERY_MIN); /* Set timer every minute */ |
367 #if CONFIG_GSM | |
352 RTC_ENABLE_IT_TIMER; | 368 RTC_ENABLE_IT_TIMER; |
369 #else | |
370 RTC_DISABLE_IT_TIMER; | |
371 #endif | |
353 RTC_DISABLE_IT_ALARM; | 372 RTC_DISABLE_IT_ALARM; |
354 | 373 |
355 rvf_enable(); | 374 rvf_enable(); |
356 | 375 |
357 /* The stack is entirely filled with the pattern 0xFE. */ | 376 /* The stack is entirely filled with the pattern 0xFE. */ |
669 return TRUE; | 688 return TRUE; |
670 else | 689 else |
671 return FALSE; | 690 return FALSE; |
672 } | 691 } |
673 | 692 |
674 | 693 #if CONFIG_GSM |
675 /******************************************************************************* | 694 /******************************************************************************* |
676 * | 695 * |
677 * RTC_ItTimerHandle | 696 * RTC_ItTimerHandle |
678 * | 697 * |
679 ******************************************************************************/ | 698 ******************************************************************************/ |
724 } | 743 } |
725 /*toto = value; tmp*/ | 744 /*toto = value; tmp*/ |
726 /*NU_Activate_HISR(&hisr); tmp*/ | 745 /*NU_Activate_HISR(&hisr); tmp*/ |
727 | 746 |
728 } | 747 } |
729 | 748 #endif |
730 | 749 |
731 /******************************************************************************* | 750 /******************************************************************************* |
732 * | 751 * |
733 * RTC_ItAlarmHandle | 752 * RTC_ItAlarmHandle |
734 * | 753 * |
745 | 764 |
746 /* Free alarm IT line */ | 765 /* Free alarm IT line */ |
747 RTC_FREE_AL_ITLINE; | 766 RTC_FREE_AL_ITLINE; |
748 } | 767 } |
749 | 768 |
769 #if CONFIG_GSM | |
750 /******************************************************************************* | 770 /******************************************************************************* |
751 * | 771 * |
752 * RTC_GaugingHandler | 772 * RTC_GaugingHandler |
753 * | 773 * |
754 ******************************************************************************/ | 774 ******************************************************************************/ |
761 /* Number of high frequency clock at the end of the gauging */ | 781 /* Number of high frequency clock at the end of the gauging */ |
762 /* To convert in nbr of 13 Mhz clocks (5*13=65Mhz) */ | 782 /* To convert in nbr of 13 Mhz clocks (5*13=65Mhz) */ |
763 rtc_nb_hf = ( ((*(volatile UINT16 *)ULDP_COUNTER_HI_FREQ_MSB_REG) * 0x10000) + | 783 rtc_nb_hf = ( ((*(volatile UINT16 *)ULDP_COUNTER_HI_FREQ_MSB_REG) * 0x10000) + |
764 (*(volatile UINT16 *)ULDP_COUNTER_HI_FREQ_LSB_REG) ); | 784 (*(volatile UINT16 *)ULDP_COUNTER_HI_FREQ_LSB_REG) ); |
765 } | 785 } |
766 | 786 #endif |
767 | 787 |
768 /******************************************************************************* | 788 /******************************************************************************* |
769 * | 789 * |
770 * RTC_ProcessAlarmEvent | 790 * RTC_ProcessAlarmEvent |
771 * | 791 * |