--- a/gsm-fw/L1/cfile/l1_pwmgr.c	Fri Aug 08 03:31:14 2014 +0000
+++ b/gsm-fw/L1/cfile/l1_pwmgr.c	Fri Aug 08 05:32:56 2014 +0000
@@ -6,7 +6,14 @@
  *  Copyright 2003 (C) Texas Instruments
  *
  ************* Revision Controle System Header *************/
+
 // pinghua add these programe code section to put some sleep code into internal ram.
+/*
+ * FreeCalypso: the Leonardo binary object version puts all of l1_pwmgr
+ * into the regular run-from-flash text section, so we'll do the same
+ * for now.
+ */
+#if 0
 #pragma CODE_SECTION(l1s_sleep_manager,".emifconf")
 #pragma CODE_SECTION(EMIF_SetConfReg,".emifconf")
 #pragma CODE_SECTION(audio_madc_sleep,".emifconf")
@@ -29,9 +36,14 @@
 #pragma CODE_SECTION(l1s_gauging_task,".emifconf")
 #pragma CODE_SECTION(l1s_gauging_task_end,".emifconf")
 // 2-03-2007 pinghua added end
+#endif
+
 #define  L1_PWMGR_C
 //#pragma DUPLICATE_FOR_INTERNAL_RAM_START
 
+#include "config.h"
+#include "l1_confg.h"
+
 //sajal added .....................................
   #if (CODE_VERSION == SIMULATION)
   //#include "l1_pwmgr.h"
@@ -65,19 +77,11 @@
 
 
 
-#include "timer/timer2.h"
-#include "armio/armio.h"
-
-//omaps00090550 #include "l1_macro.h"
-#include "l1_confg.h"
-
-#if (OP_L1_STANDALONE == 1)
-  #include "uart/serialswitch_core.h"
-#else
-  #include "uart/serialswitch.h"
-#endif
-
-#if (OP_L1_STANDALONE == 0)
+#include "../../bsp/timer2.h"
+#include "../../bsp/armio.h"
+#include "../../serial/serialswitch.h"
+
+#if 0 //(OP_L1_STANDALONE == 0)
   #include "sim/sim.h"
   #include "rv_swe.h"
 #endif
@@ -162,8 +166,8 @@
   #include "l1_types.h"
   #include "l1_const.h"
 
-  #include "abb/abb.h"
-  #include "dma/sys_dma.h"
+  #include "../../bsp/abb+spi/abb.h"
+  /* #include "dma/sys_dma.h" */
 
   #if (OP_BT == 1)
     #include "hci_ll_simul.h"
@@ -200,11 +204,11 @@
   #include "l1_tabs.h"
   #include "sys_types.h"
   #include "tpudrv.h"
-  #include "cust_os.h"
+  #include "../../gpf/inc/cust_os.h"
   #include "l1_msgty.h"
   #include "l1_proto.h"
   #include "l1_trace.h"
-  #include "timer/timer.h"
+  #include "../../bsp/timer.h"
 
 
   #if (CHIPSET == 12) || (CHIPSET == 15)
@@ -334,13 +338,13 @@
 
 
   #else  //(CHIPSET == 12) || (CHIPSET == 15)
-    #include "inth/iq.h"
-    #include "inth/inth.h"
+    #include "../../bsp/iq.h"
+    #include "../../bsp/inth.h"
   #endif
 //  #include "timer1.h"
-  #include "ulpd/ulpd.h"
-  #include "clkm/clkm.h"
-  #include "memif/mem.h"
+  #include "../../bsp/ulpd.h"
+  #include "../../bsp/clkm.h"
+  #include "../../bsp/mem.h"
   #if L2_L3_SIMUL
     #include "hw_debug.h"
   #endif
@@ -360,7 +364,9 @@
 #endif
 #endif
 
+#if (CHIPSET == 15)
   #include "drp_api.h"
+#endif
 
 #endif // NO SIMULATION
 
@@ -401,7 +407,7 @@
 extern void l1s_trace_mftab(void);
 #endif
 
-#if (CODE_VERSION != SIMULATION)
+#if (CODE_VERSION != SIMULATION) && (CHIPSET == 15)
 extern T_DRP_REGS_STR  *drp_regs;
 #endif
 
@@ -457,7 +463,7 @@
 #if(CHIPSET == 15)
 
 /************************************************************/
-/* Configure EMIF for optimal consumption                              */
+/* Configure EMIF for optimal consumption                   */
 /************************************************************/
 
 
@@ -1539,7 +1545,7 @@
   #endif
 
 #if(CHIPSET == 15)
-		Uint8   sleep_status;
+	Uint8   sleep_status;
 #endif
 
 #if (GSM_IDLE_RAM != 0)
@@ -1625,10 +1631,10 @@
         // free System structure
         // Enable all IRQ
         //l1_pwmgr_irq_dis_flag = 0;
-#if (CODE_VERSION!=SIMULATION)
+      #if (CODE_VERSION!=SIMULATION)
         INT_EnableIRQ();
         l1_trace_fail_sleep(FAIL_SLEEP_PERIPH_CHECK, l1_pwmgr_debug.fail_id, l1_pwmgr_debug.fail_ret_val);
-       #endif
+      #endif
     #if (GSM_IDLE_RAM != 0)
     gsm_idle_ram_ctl->os_load = 0;
     gsm_idle_ram_ctl->hw_timer = 0;
@@ -1644,12 +1650,12 @@
     // check OS loading
     //=================================================
     OSload = OS_get_inactivity_ticks();
-	#if (CODE_VERSION!=SIMULATION)
+  #if (CODE_VERSION!=SIMULATION)
     if ((OSload >= 0) && (OSload <= MIN_SLEEP_TIME)){
       l1_pwmgr_debug.fail_id = FAIL_SLEEP_DUE_TO_OSLOAD;
       l1_pwmgr_debug.fail_ret_val = OSload;
     }
-   #endif //NOT SIMULATION
+  #endif //NOT SIMULATION
 
     //=================================================
     // check HW Timers loading
@@ -1716,7 +1722,7 @@
 
 
 #if (OP_L1_STANDALONE == 0)
-		/*GC_Wakeup(); 	OMAPS00134004*/
+	/*GC_Wakeup(); 	OMAPS00134004*/
 #endif
 
 #if (CODE_VERSION != SIMULATION)
@@ -1741,7 +1747,7 @@
 #if (CHIPSET != 15)
         SER_WakeUpUarts();  // Wake up Uarts
 #else
-		// To be checked if this needs a change
+	// To be checked if this needs a change
 #endif
 
 #if (GSM_IDLE_RAM != 0)
@@ -1806,7 +1812,7 @@
                  !CLKM_READ_nIDLE3)
             #else
              if ((l1s.pw_mgr.enough_gaug == TRUE) || (l1a_l1s_com.mode == CS_MODE0))
-         #endif
+            #endif
          #endif
            l1s.pw_mgr.sleep_performed = CLOCK_STOP;
          else
@@ -1945,9 +1951,9 @@
 		 if(!sleep_status)
 		 {
 
-		 #if (OP_L1_STANDALONE == 0)
-			/*GC_Wakeup(); 	OMAPS00134004*/
-#endif
+	 #if (OP_L1_STANDALONE == 0)
+		/*GC_Wakeup(); 	OMAPS00134004*/
+	 #endif
 
             #if (CODE_VERSION != SIMULATION)
 			OS_system_Unprotect();
@@ -1992,7 +1998,7 @@
        {
            // ==== STop RF and TPU..... ===================
 
-		   //L1_trace_string("Proceeding to Deep Sleep\n");
+	   //L1_trace_string("Proceeding to Deep Sleep\n");
 
 
            l1dmacro_RF_sleep();
@@ -2058,7 +2064,7 @@
        // if CLOCK_STOP or FRAME-STOP : Asleep OMEGA (ABB)
        //==============================================
        #if (ANALOG != 11)
-       afc_fix = ABB_sleep(l1s.pw_mgr.sleep_performed, l1s.afc,l1s.pw_mgr.afc_bypass_mode);
+       afc_fix = ABB_sleep(l1s.pw_mgr.sleep_performed, l1s.afc);
        #else
        // Nothing to be done as it should be handled by BSP_TWL3029_Configure_DS/BS
        #endif
@@ -2070,9 +2076,9 @@
        // STop SPI .....
        //=================================================
 
-		#if(CHIPSET != 15)
-			*((volatile UWORD16 *)MEM_SPI)&=0xFFFE;  // SPI CLK DISABLED
-		#endif
+	#if(CHIPSET != 15)
+		*((volatile UWORD16 *)MEM_SPI)&=0xFFFE;  // SPI CLK DISABLED
+	#endif
      #endif // NOT SIMULATION
 
 
@@ -2103,10 +2109,10 @@
       {
         // DEEP SLEEP -> need time to setup afc and rf
          wake_up_time = min_time - l1_config.params.rf_wakeup_tpu_scenario_duration;
-		 #if (CODE_VERSION == NOT_SIMULATION)
+	 #if (CODE_VERSION == NOT_SIMULATION)
 	// Sleep one more TDMA - this is done as part of merging init and TPU control
 	      wake_up_time += 1;
-		  #endif
+	 #endif
 
       }
       else
@@ -2193,16 +2199,16 @@
             //Shut down PERIPHERALS clocks UWIRE and ARMIO if authorized
             //==========================================================
 
-		  #if(CHIPSET != 15)
+	  #if(CHIPSET != 15)
 		UWORD16  clocks_stopped; //OMAPS90550- new
             clocks_stopped = (l1s.pw_mgr.clocks & l1s.pw_mgr.modules_status);
             if((clocks_stopped & ARMIO_CLK_CUT) == ARMIO_CLK_CUT)
               *((volatile UWORD16 *)ARMIO_CNTL_REG) &= ~(ARMIO_CLOCKEN);
             if((clocks_stopped & UWIRE_CLK_CUT) == UWIRE_CLK_CUT)
               *((volatile UWORD16 *)(MEM_UWIRE + 0x8)) &= ~(0x0001);
-		  #else
-			// Nothing to be done as it is taken care by Locosto_Configure_BS
-		  #endif
+	  #else
+	     // Nothing to be done as it is taken care by Locosto_Configure_BS
+	  #endif
 
           #if (W_A_CALYPSO_BUG_01435 == 1)
             f_arm_sleep_cmd(BIG_SLEEP);
@@ -2237,9 +2243,9 @@
       #endif
 
 
-		l1s_wakeup();
-
-	    #if (CHIPSET == 15)
+	l1s_wakeup();
+
+       #if (CHIPSET == 15)
          // The following command writes '1' into CKM_OCPCLK register in DRP;
          // This is done after the DPLL is up
          // CKM_OCPCLK (R/W) = Address 0xFFFF040C
@@ -2277,7 +2283,7 @@
         if ( l1s.pw_mgr.sleep_performed == CLOCK_STOP )
         {
             // (*(volatile UWORD16 *)l1s_tpu_com.reg_cmd) = TPU_CTRL_CLK_EN;
-			UWORD8 local_sleep_status;
+		UWORD8 local_sleep_status;
 
 
 			#if (CHIPSET == 15)
@@ -2327,15 +2333,15 @@
         //=================================================
         //if CLOCK_STOP or FRAME-STOP : ReStart SPI
         //=================================================
-		#if(CHIPSET != 15)
-			*((volatile UWORD16 *)MEM_SPI)|=0x0001;  // SPI CLK ENABLED
-		#endif
+	#if(CHIPSET != 15)
+		*((volatile UWORD16 *)MEM_SPI)|=0x0001;  // SPI CLK ENABLED
+	#endif
 
         //=================================================
         // Wake up ABB
         //=================================================
         #if (ANALOG != 11)
-        ABB_wakeup(l1s.pw_mgr.sleep_performed,l1s.afc,l1s.pw_mgr.afc_bypass_mode);
+        ABB_wakeup(l1s.pw_mgr.sleep_performed, l1s.afc);
         #else
         // Nothing to be done here as it will be handled by BSP_TWL3029_Wakeup_DS/BS
         #endif
@@ -2356,7 +2362,7 @@
 
       #if (OP_L1_STANDALONE == 0)
 		/*GC_Wakeup(); 	OMAPS00134004*/
-#endif
+      #endif
 
       #if (CODE_VERSION != SIMULATION)
         //=================================================
@@ -2424,7 +2430,7 @@
 #if (CHIPSET != 15)
         SER_WakeUpUarts();  // Wake up Uarts
 #else
-		// To be checked if this needs a change
+	// To be checked if this needs a change
 #endif
 
 
@@ -3125,7 +3131,7 @@
             #endif
 
             // DSP programmation .......
-            #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
+            #if (DSP >= 33)
               #if (CHIPSET==4)
                 l1s_dsp_com.dsp_ndb_ptr->d_pll_config |= B_32KHZ_CALIB;
               #endif
@@ -3176,7 +3182,7 @@
            #endif
 
            // DSP programmation : free IDLE modes...
-           #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
+           #if (DSP >= 33)
              #if (CHIPSET==4)
               l1s_dsp_com.dsp_ndb_ptr->d_pll_config &= ~B_32KHZ_CALIB;
              #endif