--- a/gsm-fw/L1/cust0/l1_rf2.h	Sun Nov 17 04:50:45 2013 +0000
+++ b/gsm-fw/L1/cust0/l1_rf2.h	Sun Nov 17 04:59:55 2013 +0000
@@ -33,7 +33,7 @@
 /* TXPWR configuration...           */
 /************************************/
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
   #define FIXED_TXPWR       ((0x1FF << 6) | AUXAPC | FALSE)            // TXPWR=15
 //  #define FIXED_TXPWR       ((0xFF << 6) | AUXAPC | FALSE)
 #endif
@@ -42,7 +42,7 @@
 /* TX Propagation delay...          */
 /************************************/
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
 //  #define  PRG_TX                ( 52L ) 
   #define  PRG_TX                ( 8L) 
 #endif
@@ -63,7 +63,7 @@
                                               // !! minimum Value : 1 Frame due to the fact there is no
                                               // hisr() in the first wake-up frame !!!!
 
-#if (ANLG_FAM == 1)
+#if (ANALOG == 1)
   /************************************/
   /* Omega power on...                */
   /************************************/
@@ -84,7 +84,7 @@
   #define  C_APCDEL1        ((0x000 << 6) | APCDEL1   | FALSE) 
 #endif
 
-#if (ANLG_FAM == 2)
+#if (ANALOG == 2)
   /************************************/
   /* Iota power on...                 */
   /************************************/
@@ -108,7 +108,7 @@
   #define  C_APCDEL2        ((0x000 << 6) | APCDEL2   | TRUE )
 #endif
 
-#if (ANLG_FAM == 3)
+#if (ANALOG == 3)
   // SYREN registers values will be programmed at 1st DSP communication interrupt
   #define  C_DEBUG1          (0x0000                  | FALSE)      // Enable f_tx delay of 400000 cyc DEBUG 
   #define  C_AFCCTLADD      ((0x000 << 6) | AFCCTLADD | TRUE )      // Value at reset
@@ -212,7 +212,7 @@
 /*       Ramp definitions           */
 /************************************/
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
   typedef struct
   {
     UWORD8  ramp_up     [16];  // Ramp-up profile
@@ -460,18 +460,18 @@
 /************************************/
 /* ABB (Omega) Initialization       */
 /************************************/
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2))
+#if ((ANALOG == 1) || (ANALOG == 2))
   #define ABB_TABLE_SIZE 16
 #endif
 
-#if (ANLG_FAM == 3)
+#if (ANALOG == 3)
   #define ABB_TABLE_SIZE 22
 #endif
 
 // Note that this translation is probably not needed at all. But until L1 is
 // (maybe) changed to simply initialize the ABB from a table of words, we
 // use this to make things more easy-readable.
-#if (ANLG_FAM == 1)
+#if (ANALOG == 1)
   enum ABB_REGISTERS {
     ABB_AFCCTLADD = 0,
     ABB_VBUCTRL,
@@ -485,7 +485,7 @@
     ABB_VBCTRL,
     ABB_APCDEL1
   };
-#elif (ANLG_FAM == 2)
+#elif (ANALOG == 2)
   enum ABB_REGISTERS {
     ABB_AFCCTLADD = 0,
     ABB_VBUCTRL,
@@ -502,7 +502,7 @@
     ABB_APCDEL1,
     ABB_APCDEL2
   };
-#elif (ANLG_FAM == 3)
+#elif (ANALOG == 3)
   enum ABB_REGISTERS {
     ABB_AFCCTLADD = 0,
     ABB_VBUCTRL,