FreeCalypso > hg > freecalypso-sw
diff gsm-fw/L1/cust0/l1_rf35.h @ 152:26472940e5b0
l1_rf<N>.h headers preened
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
---|---|
date | Sun, 17 Nov 2013 04:59:55 +0000 |
parents | d0de2d0a426d |
children |
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--- a/gsm-fw/L1/cust0/l1_rf35.h Sun Nov 17 04:50:45 2013 +0000 +++ b/gsm-fw/L1/cust0/l1_rf35.h Sun Nov 17 04:59:55 2013 +0000 @@ -27,7 +27,7 @@ /* TXPWR configuration... */ /* Fixed TXPWR value when GSM management is disabled. */ /******************************************************/ -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2)) +#if ((ANALOG == 1) || (ANALOG == 2)) // #define FIXED_TXPWR 0x3f12 // TXPWR=10, value=252 // #define FIXED_TXPWR 0x0a12 // TXPWR=15, value=40 #define FIXED_TXPWR 0x1a12 // TXPWR=15, EVA4, CRTP1 @@ -40,29 +40,29 @@ #define DL_DELAY_RF 1 // time spent in the Downlink global RF chain by the modulated signal #define UL_DELAY_1RF 5 // time spent in the first uplink RF block #define UL_DELAY_2RF 0 // time spent in the second uplink RF block -#if (ANLG_FAM == 1) +#if (ANALOG == 1) #define UL_ABB_DELAY 6 // modulator input to output delay #endif -#if (ANLG_FAM == 2) +#if (ANALOG == 2) #define UL_ABB_DELAY 3 // modulator input to output delay #endif /************************************/ /* TX Propagation delay... */ /************************************/ -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2)) +#if ((ANALOG == 1) || (ANALOG == 2)) #define PRG_TX (DL_DELAY_RF + UL_DELAY_2RF + (GUARD_BITS*4) + UL_DELAY_1RF + UL_ABB_DELAY) // = 40 + NB_MARGIN #endif /************************************/ /* Initial value for APC DELAY */ /************************************/ -#if (ANLG_FAM == 1) +#if (ANALOG == 1) //#define APCDEL_DOWN (32 - GUARD_BITS*4) // minimum value: 2 #define APCDEL_DOWN 2 // minimum value: 2 #define APCDEL_UP (6+5) // minimum value: 6 #endif -#if (ANLG_FAM == 2) +#if (ANALOG == 2) //#define APCDEL_DOWN (32 - GUARD_BITS*4) // minimum value: 2 #define APCDEL_DOWN 2 // minimum value: 2 #define APCDEL_UP (6+2) // minimum value: 6 @@ -82,7 +82,7 @@ /************************************/ /* Baseband registers */ /************************************/ -#if (ANLG_FAM == 1) +#if (ANALOG == 1) // Omega registers values will be programmed at 1st DSP communication interrupt #define C_DEBUG1 0x0000 // Enable f_tx delay of 400000 cyc DEBUG #define C_AFCCTLADD 0x002a | TRUE // Value at reset @@ -99,7 +99,7 @@ #define C_APCDEL1 (((APCDEL_DOWN-2)<<11) | ((APCDEL_UP-6)<<6) | 0x0004) #define C_BBCTRL 0x604c | TRUE // OUTLEV1=OUTLEV1=SELVMID1=SELVMID0=1 for B-sample 'modified' #endif -#if (ANLG_FAM == 2) +#if (ANALOG == 2) // IOTA registers values will be programmed at 1st DSP communication interrupt #define C_DEBUG1 0x0001 // Enable f_tx delay of 400000 cyc DEBUG #define C_AFCCTLADD 0x002a | TRUE // Value at reset @@ -192,7 +192,7 @@ /************************************/ /* Ramp definitions */ /************************************/ -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2)) +#if ((ANALOG == 1) || (ANALOG == 2)) typedef struct { UWORD8 ramp_up [16]; // Ramp-up profile @@ -440,7 +440,7 @@ // Note that this translation is probably not needed at all. But until L1 is // (maybe) changed to simply initialize the ABB from a table of words, we // use this to make things more easy-readable. -#if (ANLG_FAM == 1) +#if (ANALOG == 1) enum ABB_REGISTERS { ABB_AFCCTLADD = 0, ABB_VBUCTRL, @@ -454,7 +454,7 @@ ABB_VBCTRL, ABB_APCDEL1 }; -#elif (ANLG_FAM == 2) +#elif (ANALOG == 2) enum ABB_REGISTERS { ABB_AFCCTLADD = 0, ABB_VBUCTRL,