diff gsm-fw/L1/cust0/l1_rf8.h @ 152:26472940e5b0

l1_rf<N>.h headers preened
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sun, 17 Nov 2013 04:59:55 +0000
parents d0de2d0a426d
children
line wrap: on
line diff
--- a/gsm-fw/L1/cust0/l1_rf8.h	Sun Nov 17 04:50:45 2013 +0000
+++ b/gsm-fw/L1/cust0/l1_rf8.h	Sun Nov 17 04:59:55 2013 +0000
@@ -31,7 +31,7 @@
 /* Fixed TXPWR value when GSM management is disabled. */
 /******************************************************/
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
 //  #define FIXED_TXPWR       ((0xFC << 6) | AUXAPC | FALSE)            // TXPWR=10, value=252
 //  #define FIXED_TXPWR       ((0x28 << 6) | AUXAPC | FALSE)  
   #define FIXED_TXPWR       ((0x68 << 6) | AUXAPC | FALSE)            // TXPWR=15
@@ -46,11 +46,11 @@
 #define  UL_DELAY_1RF     5   // time spent in the first  uplink RF block
 #define  UL_DELAY_2RF     0   // time spent in the second uplink RF block
 
-#if (ANLG_FAM == 1)
+#if (ANALOG == 1)
   #define  UL_ABB_DELAY   0   // modulator input to output delay, theoretical value is 6, needs to be checked
 #endif
 
-#if ((ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 2) || (ANALOG == 3))
   #define  UL_ABB_DELAY   3   // modulator input to output delay
 #endif
 
@@ -58,7 +58,7 @@
 /* TX Propagation delay...          */
 /************************************/
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
   #define  PRG_TX       (DL_DELAY_RF + UL_DELAY_2RF + (GUARD_BITS*4) + UL_DELAY_1RF + UL_ABB_DELAY)   // = 40
 #endif
 
@@ -66,13 +66,13 @@
 /* Initial value for APC DELAY      */
 /************************************/
 
-#if (ANLG_FAM == 1)
+#if (ANALOG == 1)
 //#define APCDEL_DOWN     (32 - GUARD_BITS*4)          // minimum value: 2
   #define APCDEL_DOWN      2                           // minimum value: 2
   #define APCDEL_UP       (6+5)                        // minimum value: 6
 #endif
 
-#if (ANLG_FAM == 2) || (ANLG_FAM == 3)
+#if (ANALOG == 2) || (ANALOG == 3)
 //#define APCDEL_DOWN     (32 - GUARD_BITS*4)          // minimum value: 2
   #define APCDEL_DOWN     (2+0)                           // minimum value: 2
   #define APCDEL_UP       (6+2)                        // minimum value: 6
@@ -94,7 +94,7 @@
 /* Baseband registers               */
 /************************************/
 
-#if (ANLG_FAM == 1)
+#if (ANALOG == 1)
   // Omega registers values will be programmed at 1st DSP communication interrupt
   #define  C_DEBUG1          (0x0000                  | FALSE)      // Enable f_tx delay of 400000 cyc DEBUG 
   #define  C_AFCCTLADD      ((0x000 << 6) | AFCCTLADD | TRUE )      // Value at reset
@@ -112,7 +112,7 @@
   #define  C_BBCTRL         ((0x181 << 6) | BBCTRL    | TRUE)       // OUTLEV1=OUTLEV1=SELVMID1=SELVMID0=1 for B-sample 'modified'
 #endif
 
-#if (ANLG_FAM == 2)
+#if (ANALOG == 2)
   // IOTA registers values will be programmed at 1st DSP communication interrupt
   #define  C_DEBUG1          (0x0000                  | TRUE )      // Enable f_tx delay of 400000 cyc DEBUG 
   #define  C_AFCCTLADD      ((0x000 << 6) | AFCCTLADD | TRUE )      // Value at reset
@@ -135,7 +135,7 @@
   #define  C_BULGCAL        ((0x000 << 6) | BULGCAL   | TRUE )      // IAG=0 dB, QAG=0 dB
 #endif
 
-#if (ANLG_FAM == 3)
+#if (ANALOG == 3)
   // SYREN registers values will be programmed at 1st DSP communication interrupt
   #define  C_DEBUG1          (0x0000                  | TRUE )      // Enable f_tx delay of 400000 cyc DEBUG 
   #define  C_AFCCTLADD      ((0x000 << 6) | AFCCTLADD | TRUE )      // Value at reset
@@ -247,7 +247,7 @@
 /*       Ramp definitions           */
 /************************************/
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
+#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
   typedef struct
   {
     UWORD8  ramp_up     [16];  // Ramp-up profile
@@ -498,11 +498,11 @@
 /* ABB (Omega) Initialization       */
 /************************************/
 
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2))
+#if ((ANALOG == 1) || (ANALOG == 2))
   #define ABB_TABLE_SIZE 16
 #endif
 
-#if (ANLG_FAM == 3)
+#if (ANALOG == 3)
   #define ABB_TABLE_SIZE 22
 #endif
 
@@ -510,7 +510,7 @@
 // (maybe) changed to simply initialize the ABB from a table of words, we
 // use this to make things more easy-readable.
 
-#if (ANLG_FAM == 1)
+#if (ANALOG == 1)
   enum ABB_REGISTERS {
     ABB_AFCCTLADD = 0,
     ABB_VBUCTRL,
@@ -526,7 +526,7 @@
   };
 #endif
 
-#if (ANLG_FAM == 2)
+#if (ANALOG == 2)
   enum ABB_REGISTERS {
     ABB_AFCCTLADD = 0,
     ABB_VBUCTRL,
@@ -545,7 +545,7 @@
   };
 #endif
 
-#if (ANLG_FAM == 3)
+#if (ANALOG == 3)
   enum ABB_REGISTERS {
     ABB_AFCCTLADD = 0,
     ABB_VBUCTRL,