FreeCalypso > hg > freecalypso-sw
diff nuc-fw/bsp/armio.c @ 93:45911ad957fd
nuc-fw: beginning to integrate TI's BSP code
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Sat, 31 Aug 2013 23:43:23 +0000 |
parents | |
children | 325bbadc0c9c |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/nuc-fw/bsp/armio.c Sat Aug 31 23:43:23 2013 +0000 @@ -0,0 +1,239 @@ +/* + * ARMIO.C + * + * + * Control diagnostic bits + * + * Reference : GCS207 + * + */ + + +#include "../include/config.h" +#include "../include/sys_types.h" + +#include "mem.h" +#include "iq.h" +#include "armio.h" + +#if 0 +/* FreeCalypso: abb.h hasn't been integrated yet */ +#include "abb.h" // for AI_Power function : to be removed, use ABB_Power_Off in abb.c file instead !!! +#endif + +#if (CHIPSET != 12) +/* + * AI_EnableBit + * + * Enable ARMIO input/output bit (see CLKM module specification) + */ +void AI_EnableBit(int bit) +{ + *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) |= (1<<bit); +} + +/* + * AI_DisableBit + * + * Disable ARMIO input/output bit (see CLKM module specification) + */ +void AI_DisableBit(int bit) +{ + *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) &= ~(1<<bit); +} + +#endif /* CHIPSET != 12 */ + +/* + * AI_SetBit + * + * Switch-on one bit + */ +void AI_SetBit(int bit) +{ + *((volatile SYS_UWORD16 *) ARMIO_OUT) |= (1<<bit); +} + +/* + * AI_ResetBit + * + * Switch-off one bit + */ +void AI_ResetBit(int bit) +{ + *((volatile SYS_UWORD16 *) ARMIO_OUT) &= ~(1<<bit); +} + +/* + * AI_ConfigBitAsOutput + * + * Set this bit as an output + */ +void AI_ConfigBitAsOutput(int bit) +{ + *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) &= ~(1<<bit); +} + +/* + * AI_ConfigBitAsInput + * + * Set this bit as an input + */ +void AI_ConfigBitAsInput(int bit) +{ + *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) |= (1<<bit); +} + + +/* + * AI_ReadBit + * + * Read value in register + */ +SYS_BOOL AI_ReadBit(int bit) +{ + if ((*((volatile SYS_UWORD16 *) ARMIO_IN)) & (1<<bit)) + return (1); + else + return (0); +} + +/* + * AI_Power + * + * Switch-on or off the board + * + * Parameters : SYS_UWORD8 power: 1 to power-on (maintain power) + * 0 to power-off + * + */ +// #if (!OP_L1_STANDALONE) +#if 0 +void AI_Power(SYS_UWORD8 power) +{ + if (power == 0) + { + ABB_Power_Off(); + } +} +#endif + +/* + * AI_ResetIoConfig + * + * Reset all default IO configurations + * + */ +void AI_ResetIoConfig(void) +{ + *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0xFFFF; // all bits are inputs +#if (CHIPSET != 12) + *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) = 0; // default config + #endif /* CHIPSET != 12 */ +} + + +/* + * AI_ClockEnable + * + * Enable ARMIO clock module + * + */ +void AI_ClockEnable(void) +{ + *((volatile SYS_UWORD16 *) ARMIO_CNTL_REG) |= ARMIO_CLOCKEN; // set to 1 bit 5 +} + +/* + * The target-specific AI_InitIOConfig() function will need to go here. + */ + +/* + * AI_SelectIOForIT + * + * Select which IO will be used to generate an interrupt. + * 'Edge' specifies if interrup must be detected on falling or rising edge. + * + * Warning: parameters are not checked. + */ + +void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge) +{ + #if (CHIPSET == 12) + /* + * Update INTERRUPT_LEVEL_REG with Edge configuration on Pin selection + */ + GPIO_INTERRUPT_LEVEL_REG = (Edge & 0x0001) << Pin; + + /* + * Update INTERRUPT_MASK_REG to enable interrupt generation on Pin selection + */ + GPIO_INTERRUPT_MASK_REG = 1 << Pin; + #else + /* + * Bit SET_GPIO_EVENT_MODE (bit 0) is set to enable the GPIO event mode. + */ + + *((volatile SYS_UWORD16 *) ARMIO_GPIO_EVENT_MODE) = (Pin << 1) + (Edge << 5) + 1; + #endif +} + +#if (CHIPSET != 12) +/* + * AI_CheckITSource + * + * Check if the interrupt specified by 'Source' is active or not. + * + * Output: 0: IT is not active + * 1: IT is active + * + * Warning: parameters are not checked. + * + * Warning: If the keypad and GPIO interrupts may occur the GPIO interrupt + * must be checked first because the GPIO status bit is reset when + * the register is read. + */ + +int AI_CheckITSource (SYS_UWORD16 Source) +{ + return (*((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_INT) & Source ? 1 : 0); +} + +/* + * AI_UnmaskIT + * + * Unmask the IT specified by 'Source' (keyboard or GPIO). + * + * Warning: parameters are not checked. + */ + +void AI_UnmaskIT (SYS_UWORD16 Source) +{ + *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) &= ~Source; +} + +/* + * AI_MaskIT + * + * Mask the IT specified by 'Source' (keyboard or GPIO). + * + * Warning: parameters are not checked. + */ + +void AI_MaskIT (SYS_UWORD16 Source) +{ + *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) |= Source; +} +#endif /* CHIPSET != 12 */ + +#if (CHIPSET == 12) + + void AI_MaskIT(SYS_UWORD16 d_io_number) { + GPIO_INTERRUPT_MASK_REG |= (1 << d_io_number); + } /* f_gpio_mask_it() */ + + void AI_UnmaskIT(SYS_UWORD16 d_io_number) { + GPIO_INTERRUPT_MASK_REG &= ~(1 << d_io_number); + } /* f_gpio_unmask_it() */ + +#endif