FreeCalypso > hg > freecalypso-tools

annotate target-utils/simagent/simup.c @ 975:343552c6c621

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doc/Loadtools-usage: add SE J120
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 28 Nov 2023 19:08:53 +0000
parents badc5399d641
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 #include <sys/types.h>
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2 #include <strings.h>
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3 #include "types.h"
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4 #include "abbdefs.h"
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5 #include "simregs.h"
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6 #include "timeout.h"
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7
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8 #define MAX_ATR_BYTES 33
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9
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10 #define WAIT_ONE_TDMA 60000
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11
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12 extern u16 abb_reg_read();
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13 extern void abb_reg_write();
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14
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15 extern const u8 inverse_coding_table[256];
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16
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17 int sim_if_state;
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18 u16 conf1_reg;
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19 u8 atr_buf[MAX_ATR_BYTES];
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20 unsigned atr_length;
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21 int inverse_coding;
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22
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23 void
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24 print_atr()
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25 {
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26 unsigned n;
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27
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28 printf("ATR:");
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29 for (n = 0; n < atr_length; n++)
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30 printf(" %02X", atr_buf[n]);
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31 putchar('\n');
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32 }
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33
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34 static
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Mychaela Falconia <falcon@freecalypso.org>
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35 rx_atr_byte()
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36 {
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37 int rc;
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38
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39 rc = rx_sim_byte(SIM_WAIT_TIMEOUT);
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40 if (rc < 0) {
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41 printf("ERROR: timeout waiting for subsequent byte of ATR\n");
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Mychaela Falconia <falcon@freecalypso.org>
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42 return(-1);
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43 }
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44 rc &= 0xFF;
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45 if (inverse_coding)
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46 rc = inverse_coding_table[rc];
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Mychaela Falconia <falcon@freecalypso.org>
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47 atr_buf[atr_length++] = rc;
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Mychaela Falconia <falcon@freecalypso.org>
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48 return rc;
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49 }
770
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50
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51 void
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52 cmd_sim_up(argbulk)
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53 char *argbulk;
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54 {
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55 char *argv[2];
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Mychaela Falconia <falcon@freecalypso.org>
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56 u16 abb_sim_reg;
774
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57 unsigned count, y, nhist, have_tck;
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58 int rc;
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59
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60 if (sim_if_state) {
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Mychaela Falconia <falcon@freecalypso.org>
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61 printf("ERROR: SIM interface is already up\n");
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Mychaela Falconia <falcon@freecalypso.org>
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62 return;
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Mychaela Falconia <falcon@freecalypso.org>
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63 }
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Mychaela Falconia <falcon@freecalypso.org>
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64 if (parse_args(argbulk, 1, 1, argv, 0) < 0)
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Mychaela Falconia <falcon@freecalypso.org>
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65 return;
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Mychaela Falconia <falcon@freecalypso.org>
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66 if (!strcmp(argv[0], "1.8"))
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67 abb_sim_reg = 2;
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68 else if (!strcmp(argv[0], "3"))
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69 abb_sim_reg = 3;
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70 else {
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71 printf("ERROR: \"1.8\" or \"3\" argument expected\n");
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72 return;
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Mychaela Falconia <falcon@freecalypso.org>
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73 }
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Mychaela Falconia <falcon@freecalypso.org>
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74 abb_reg_write(VRPCSIM, abb_sim_reg);
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Mychaela Falconia <falcon@freecalypso.org>
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75 sim_if_state = 1;
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76
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77 /* wait for regulator like TI's SIM_StartVolt() */
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Mychaela Falconia <falcon@freecalypso.org>
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78 for (count = 0; ; ) {
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79 abb_sim_reg = abb_reg_read(VRPCSIM);
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80 if (abb_sim_reg & 4)
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81 break;
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82 if (++count >= 5) {
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83 printf("ERROR: VRSIM is not in proper regulation\n");
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84 return;
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85 }
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86 wait_ARM_cycles(WAIT_ONE_TDMA);
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87 }
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88
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89 /* TI's SIM_ManualStart() code follows */
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90 SIMREGS.conf1 = conf1_reg = 0x8004;
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91 SIMREGS.cmd = SIM_CMD_CLKEN;
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92
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93 SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_STOP;
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94 wait_ARM_cycles(WAIT_ONE_TDMA * 4);
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95
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96 SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_SWRST;
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97 wait_ARM_cycles(WAIT_ONE_TDMA);
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98
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99 SIMREGS.conf2 = 0x0940;
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100
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101 //enter in manual mode to start the ATR sequence
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102 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_BYPASS;
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103 wait_ARM_cycles(WAIT_ONE_TDMA);
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104
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105 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SVCCLEV;
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106 wait_ARM_cycles(WAIT_ONE_TDMA);
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107
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108 abb_sim_reg |= 8;
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109 abb_reg_write(VRPCSIM, abb_sim_reg);
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110 wait_ARM_cycles(WAIT_ONE_TDMA);
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Mychaela Falconia <falcon@freecalypso.org>
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111
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112 SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_SIOLOW;
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Mychaela Falconia <falcon@freecalypso.org>
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113 wait_ARM_cycles(WAIT_ONE_TDMA);
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Mychaela Falconia <falcon@freecalypso.org>
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114
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115 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SCLKEN;
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116 SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_TXRX; //set to receive mode
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117 wait_ARM_cycles(WAIT_ONE_TDMA * 3);
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118
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119 /* flush any garbage in the Rx FIFO */
782
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Mychaela Falconia <falcon@freecalypso.org>
parents: 775
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120 rc = flush_rx_fifo();
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Mychaela Falconia <falcon@freecalypso.org>
parents: 775
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121 if (rc < 0)
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Mychaela Falconia <falcon@freecalypso.org>
parents: 775
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122 return;
770
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123 /* lift the card out of reset! */
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Mychaela Falconia <falcon@freecalypso.org>
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124 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SRSTLEV;
774
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parents: 770
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125
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parents: 770
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126 /* first byte of ATR */
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127 rc = rx_sim_byte(SIM_WAIT_TIMEOUT);
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Mychaela Falconia <falcon@freecalypso.org>
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128 if (rc < 0) {
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Mychaela Falconia <falcon@freecalypso.org>
parents: 770
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129 printf("ERROR: timeout waiting for first byte of ATR\n");
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Mychaela Falconia <falcon@freecalypso.org>
parents: 770
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130 return;
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Mychaela Falconia <falcon@freecalypso.org>
parents: 770
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131 }
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Mychaela Falconia <falcon@freecalypso.org>
parents: 770
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132 rc &= 0xFF;
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Mychaela Falconia <falcon@freecalypso.org>
parents: 770
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133 if (rc == 0x3B) {
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Mychaela Falconia <falcon@freecalypso.org>
parents: 770
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134 /* direct convention */
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Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
135 inverse_coding = 0;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
136 atr_buf[0] = 0x3B;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
137 } else if (rc == 0x03) {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
138 /* inverse convention */
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
139 inverse_coding = 1;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
140 atr_buf[0] = 0x3F;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
141 } else {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
142 printf(
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
143 "ERROR: received TS=0x%02X, matches neither convention\n",
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
144 rc);
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
145 return;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
146 }
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
147 atr_length = 1;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
148
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
149 /* remainder of ATR, starting with T0 */
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
150 rc = rx_atr_byte();
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
151 if (rc < 0)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
152 return;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
153 nhist = rc & 0xF;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
154 y = rc & 0xF0;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
155 have_tck = 0;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
156 while (y) {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
157 if (y & 0x10) {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
158 if (atr_length >= MAX_ATR_BYTES) {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
159 atr_too_long: printf("ERROR: ATR exceeds 33 byte limit\n");
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
160 return;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
161 }
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
162 rc = rx_atr_byte();
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
163 if (rc < 0)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
164 return;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
165 }
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
166 if (y & 0x20) {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
167 if (atr_length >= MAX_ATR_BYTES)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
168 goto atr_too_long;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
169 rc = rx_atr_byte();
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
170 if (rc < 0)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
171 return;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
172 }
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
173 if (y & 0x40) {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
174 if (atr_length >= MAX_ATR_BYTES)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
175 goto atr_too_long;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
176 rc = rx_atr_byte();
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
177 if (rc < 0)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
178 return;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
179 }
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
180 if (y & 0x80) {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
181 if (atr_length >= MAX_ATR_BYTES)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
182 goto atr_too_long;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
183 rc = rx_atr_byte();
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
184 if (rc < 0)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
185 return;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
186 y = rc & 0xF0;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
187 if (rc & 0x0F)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
188 have_tck = 1;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
189 } else
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
190 y = 0;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
191 }
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
192 for (count = 0; count < nhist + have_tck; count++) {
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
193 if (atr_length >= MAX_ATR_BYTES)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
194 goto atr_too_long;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
195 rc = rx_atr_byte();
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
196 if (rc < 0)
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
197 return;
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
198 }
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
199
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
200 /* all good! */
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
201 sim_if_state = 2;
775
6ec781e61e68 simagent: enable CHKPAR and CONV at the end of sim-up
Mychaela Falconia <falcon@freecalypso.org>
parents: 774
diff changeset
202 if (inverse_coding)
6ec781e61e68 simagent: enable CHKPAR and CONV at the end of sim-up
Mychaela Falconia <falcon@freecalypso.org>
parents: 774
diff changeset
203 conf1_reg |= SIM_CONF1_CONV | SIM_CONF1_CHKPAR;
6ec781e61e68 simagent: enable CHKPAR and CONV at the end of sim-up
Mychaela Falconia <falcon@freecalypso.org>
parents: 774
diff changeset
204 else
6ec781e61e68 simagent: enable CHKPAR and CONV at the end of sim-up
Mychaela Falconia <falcon@freecalypso.org>
parents: 774
diff changeset
205 conf1_reg |= SIM_CONF1_CHKPAR;
6ec781e61e68 simagent: enable CHKPAR and CONV at the end of sim-up
Mychaela Falconia <falcon@freecalypso.org>
parents: 774
diff changeset
206 SIMREGS.conf1 = conf1_reg;
774
130c46b83760 simagent: sim-up command fully implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 770
diff changeset
207 print_atr();
770
81f9e4b4f55c simagent: beginning of sim-up command
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 }