FreeCalypso > hg > freecalypso-tools
changeset 770:81f9e4b4f55c
simagent: beginning of sim-up command
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Fri, 12 Mar 2021 20:11:39 +0000 |
| parents | f18db0f00ad8 |
| children | 9c1d580b50fb |
| files | target-utils/simagent/Makefile target-utils/simagent/cmdtab.c target-utils/simagent/simup.c |
| diffstat | 3 files changed, 100 insertions(+), 1 deletions(-) [+] |
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--- a/target-utils/simagent/Makefile Fri Mar 12 06:40:24 2021 +0000 +++ b/target-utils/simagent/Makefile Fri Mar 12 20:11:39 2021 +0000 @@ -7,7 +7,7 @@ INSTDIR=/opt/freecalypso/target-bin PROG= simagent -OBJS= crt0.o cmdtab.o main.o +OBJS= crt0.o cmdtab.o main.o simup.o LIBS= ../libcommon/libcommon.a ../libprintf/libprintf.a ../libbase/libbase.a \ ../libc/libc.a LIBGCC= `${CC} -print-file-name=libgcc.a`
--- a/target-utils/simagent/cmdtab.c Fri Mar 12 06:40:24 2021 +0000 +++ b/target-utils/simagent/cmdtab.c Fri Mar 12 20:11:39 2021 +0000 @@ -7,6 +7,7 @@ extern void cmd_r8(); extern void cmd_r16(); extern void cmd_r32(); +extern void cmd_sim_up(); extern void cmd_w8(); extern void cmd_w16(); extern void cmd_w32(); @@ -26,6 +27,7 @@ {"r8", cmd_r8}, {"r16", cmd_r16}, {"r32", cmd_r32}, + {"sim-up", cmd_sim_up}, {"w8", cmd_w8}, {"w16", cmd_w16}, {"w32", cmd_w32},
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/target-utils/simagent/simup.c Fri Mar 12 20:11:39 2021 +0000 @@ -0,0 +1,97 @@ +#include <sys/types.h> +#include <strings.h> +#include "types.h" +#include "abbdefs.h" +#include "simregs.h" + +#define WAIT_ONE_TDMA 60000 + +extern u16 abb_reg_read(); +extern void abb_reg_write(); + +int sim_if_state; +u16 conf1_reg; + +void +cmd_sim_up(argbulk) + char *argbulk; +{ + char *argv[2]; + u16 abb_sim_reg; + unsigned count; + + if (sim_if_state) { + printf("ERROR: SIM interface is already up\n"); + return; + } + if (parse_args(argbulk, 1, 1, argv, 0) < 0) + return; + if (!strcmp(argv[0], "1.8")) + abb_sim_reg = 2; + else if (!strcmp(argv[0], "3")) + abb_sim_reg = 3; + else { + printf("ERROR: \"1.8\" or \"3\" argument expected\n"); + return; + } + abb_reg_write(VRPCSIM, abb_sim_reg); + sim_if_state = 1; + + /* wait for regulator like TI's SIM_StartVolt() */ + for (count = 0; ; ) { + abb_sim_reg = abb_reg_read(VRPCSIM); + if (abb_sim_reg & 4) + break; + if (++count >= 5) { + printf("ERROR: VRSIM is not in proper regulation\n"); + return; + } + wait_ARM_cycles(WAIT_ONE_TDMA); + } + + /* TI's SIM_ManualStart() code follows */ + SIMREGS.conf1 = conf1_reg = 0x8004; + SIMREGS.cmd = SIM_CMD_CLKEN; + + SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_STOP; + wait_ARM_cycles(WAIT_ONE_TDMA * 4); + + SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_SWRST; + wait_ARM_cycles(WAIT_ONE_TDMA); + + SIMREGS.conf2 = 0x0940; + + //enter in manual mode to start the ATR sequence + SIMREGS.conf1 = conf1_reg |= SIM_CONF1_BYPASS; + wait_ARM_cycles(WAIT_ONE_TDMA); + + SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SVCCLEV; + wait_ARM_cycles(WAIT_ONE_TDMA); + + abb_sim_reg |= 8; + abb_reg_write(VRPCSIM, abb_sim_reg); + wait_ARM_cycles(WAIT_ONE_TDMA); + + SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_SIOLOW; + wait_ARM_cycles(WAIT_ONE_TDMA); + + SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SCLKEN; + SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_TXRX; //set to receive mode + wait_ARM_cycles(WAIT_ONE_TDMA * 3); + + /* flush any garbage in the Rx FIFO */ + for (count = 0; ; ) { + if (SIMREGS.stat & SIM_STAT_FEMPTY) + break; + (void) SIMREGS.drx; + if (++count >= 32) { + printf("ERROR: Rx FIFO flush does not end\n"); + return; + } + } + +#if 0 + /* lift the card out of reset! */ + SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SRSTLEV; +#endif +}