FreeCalypso > hg > freecalypso-tools

annotate rvinterf/include/tm3.h @ 497:74610c4f10f7

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target-utils: added 10 ms delay at the end of abb_power_off() The deosmification of the ABB access code (replacement of osmo_delay_ms() bogus delays with correctly-timed ones, which are significantly shorter) had one annoying side effect: when executing the poweroff command from any of the programs, one last '=' prompt character was being sent (and received by the x86 host) as the Calypso board powers off. With delays being shorter now, the abb_power_off() function was returning and the standalone program's main loop was printing its prompt before the Iota chip fully executed the switch-off sequence! I thought about inserting an endless tight loop at the end of the abb_power_off() function, but the implemented solution of a 10 ms delay is a little nicer IMO because if the DEVOFF operation doesn't happen for some reason in a manual hacking scenario, there won't be an artificial blocker in the form of a tight loop keeping us from further poking around.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 25 May 2019 20:44:05 +0000
parents e7502631a0f9
children
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1 /*
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2 * This header file contains various definitions for talking to the old
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3 * non-enhanced Test Mode firmware component.
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4 */
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5
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6 /* CID opcodes */
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7 enum
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8 {
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9 TM_INIT = 0x20,
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10 TM_MODE_SET = 0x21,
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11 VERSION_GET = 0x22,
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12 RF_ENABLE = 0x23,
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13 STATS_READ = 0x24,
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14 STATS_CONFIG_WRITE = 0x25,
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15 STATS_CONFIG_READ = 0x26,
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16 RF_PARAM_WRITE = 0x30,
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17 RF_PARAM_READ = 0x31,
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18 RF_TABLE_WRITE = 0x32,
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19 RF_TABLE_READ = 0x33,
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20 RX_PARAM_WRITE = 0x34,
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21 RX_PARAM_READ = 0x35,
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22 TX_PARAM_WRITE = 0x36,
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23 TX_PARAM_READ = 0x37,
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24 TX_TEMPLATE_WRITE = 0x38,
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25 TX_TEMPLATE_READ = 0x39,
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26 MEM_WRITE = 0x40,
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27 MEM_READ = 0x41,
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28 CODEC_WRITE = 0x42,
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29 CODEC_READ = 0x43,
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30 MISC_PARAM_WRITE = 0x44,
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31 MISC_PARAM_READ = 0x45,
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32 MISC_TABLE_WRITE = 0x46,
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33 MISC_TABLE_READ = 0x47,
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34 MISC_ENABLE = 0x48,
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35 SPECIAL_PARAM_WRITE = 0x50,
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36 SPECIAL_PARAM_READ = 0x51,
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37 SPECIAL_TABLE_WRITE = 0x52,
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38 SPECIAL_TABLE_READ = 0x53,
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39 SPECIAL_ENABLE = 0x54,
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40
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41 TPU_TABLE_WRITE = 0x55,
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42 TPU_TABLE_READ = 0x56,
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43
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44 TM_FFS = 0x70
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45 };
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46
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47 #define TM3_MEMREAD_MAX 0x7C