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view rvinterf/include/tm3.h @ 497:74610c4f10f7

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target-utils: added 10 ms delay at the end of abb_power_off() The deosmification of the ABB access code (replacement of osmo_delay_ms() bogus delays with correctly-timed ones, which are significantly shorter) had one annoying side effect: when executing the poweroff command from any of the programs, one last '=' prompt character was being sent (and received by the x86 host) as the Calypso board powers off. With delays being shorter now, the abb_power_off() function was returning and the standalone program's main loop was printing its prompt before the Iota chip fully executed the switch-off sequence! I thought about inserting an endless tight loop at the end of the abb_power_off() function, but the implemented solution of a 10 ms delay is a little nicer IMO because if the DEVOFF operation doesn't happen for some reason in a manual hacking scenario, there won't be an artificial blocker in the form of a tight loop keeping us from further poking around.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 25 May 2019 20:44:05 +0000
parents e7502631a0f9
children
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/*
 * This header file contains various definitions for talking to the old
 * non-enhanced Test Mode firmware component.
 */

/* CID opcodes */
enum 
{
  TM_INIT                    = 0x20,
  TM_MODE_SET                = 0x21,
  VERSION_GET                = 0x22,
  RF_ENABLE                  = 0x23,
  STATS_READ                 = 0x24,
  STATS_CONFIG_WRITE         = 0x25,
  STATS_CONFIG_READ          = 0x26,
  RF_PARAM_WRITE             = 0x30,
  RF_PARAM_READ              = 0x31,
  RF_TABLE_WRITE             = 0x32,
  RF_TABLE_READ              = 0x33,
  RX_PARAM_WRITE             = 0x34,
  RX_PARAM_READ              = 0x35,
  TX_PARAM_WRITE             = 0x36,
  TX_PARAM_READ              = 0x37,
  TX_TEMPLATE_WRITE          = 0x38,
  TX_TEMPLATE_READ           = 0x39,
  MEM_WRITE                  = 0x40,
  MEM_READ                   = 0x41,
  CODEC_WRITE                = 0x42,
  CODEC_READ                 = 0x43,
  MISC_PARAM_WRITE           = 0x44,
  MISC_PARAM_READ            = 0x45,
  MISC_TABLE_WRITE           = 0x46,
  MISC_TABLE_READ            = 0x47,
  MISC_ENABLE                = 0x48,
  SPECIAL_PARAM_WRITE        = 0x50,
  SPECIAL_PARAM_READ         = 0x51,
  SPECIAL_TABLE_WRITE        = 0x52,
  SPECIAL_TABLE_READ         = 0x53,
  SPECIAL_ENABLE             = 0x54,

  TPU_TABLE_WRITE            = 0x55,
  TPU_TABLE_READ             = 0x56,

  TM_FFS                     = 0x70
};

#define	TM3_MEMREAD_MAX	0x7C