FreeCalypso > hg > freecalypso-tools
comparison target-utils/simagent/simup.c @ 770:81f9e4b4f55c
simagent: beginning of sim-up command
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 12 Mar 2021 20:11:39 +0000 |
parents | |
children | 130c46b83760 |
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769:f18db0f00ad8 | 770:81f9e4b4f55c |
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1 #include <sys/types.h> | |
2 #include <strings.h> | |
3 #include "types.h" | |
4 #include "abbdefs.h" | |
5 #include "simregs.h" | |
6 | |
7 #define WAIT_ONE_TDMA 60000 | |
8 | |
9 extern u16 abb_reg_read(); | |
10 extern void abb_reg_write(); | |
11 | |
12 int sim_if_state; | |
13 u16 conf1_reg; | |
14 | |
15 void | |
16 cmd_sim_up(argbulk) | |
17 char *argbulk; | |
18 { | |
19 char *argv[2]; | |
20 u16 abb_sim_reg; | |
21 unsigned count; | |
22 | |
23 if (sim_if_state) { | |
24 printf("ERROR: SIM interface is already up\n"); | |
25 return; | |
26 } | |
27 if (parse_args(argbulk, 1, 1, argv, 0) < 0) | |
28 return; | |
29 if (!strcmp(argv[0], "1.8")) | |
30 abb_sim_reg = 2; | |
31 else if (!strcmp(argv[0], "3")) | |
32 abb_sim_reg = 3; | |
33 else { | |
34 printf("ERROR: \"1.8\" or \"3\" argument expected\n"); | |
35 return; | |
36 } | |
37 abb_reg_write(VRPCSIM, abb_sim_reg); | |
38 sim_if_state = 1; | |
39 | |
40 /* wait for regulator like TI's SIM_StartVolt() */ | |
41 for (count = 0; ; ) { | |
42 abb_sim_reg = abb_reg_read(VRPCSIM); | |
43 if (abb_sim_reg & 4) | |
44 break; | |
45 if (++count >= 5) { | |
46 printf("ERROR: VRSIM is not in proper regulation\n"); | |
47 return; | |
48 } | |
49 wait_ARM_cycles(WAIT_ONE_TDMA); | |
50 } | |
51 | |
52 /* TI's SIM_ManualStart() code follows */ | |
53 SIMREGS.conf1 = conf1_reg = 0x8004; | |
54 SIMREGS.cmd = SIM_CMD_CLKEN; | |
55 | |
56 SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_STOP; | |
57 wait_ARM_cycles(WAIT_ONE_TDMA * 4); | |
58 | |
59 SIMREGS.cmd = SIM_CMD_CLKEN | SIM_CMD_SWRST; | |
60 wait_ARM_cycles(WAIT_ONE_TDMA); | |
61 | |
62 SIMREGS.conf2 = 0x0940; | |
63 | |
64 //enter in manual mode to start the ATR sequence | |
65 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_BYPASS; | |
66 wait_ARM_cycles(WAIT_ONE_TDMA); | |
67 | |
68 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SVCCLEV; | |
69 wait_ARM_cycles(WAIT_ONE_TDMA); | |
70 | |
71 abb_sim_reg |= 8; | |
72 abb_reg_write(VRPCSIM, abb_sim_reg); | |
73 wait_ARM_cycles(WAIT_ONE_TDMA); | |
74 | |
75 SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_SIOLOW; | |
76 wait_ARM_cycles(WAIT_ONE_TDMA); | |
77 | |
78 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SCLKEN; | |
79 SIMREGS.conf1 = conf1_reg &= ~SIM_CONF1_TXRX; //set to receive mode | |
80 wait_ARM_cycles(WAIT_ONE_TDMA * 3); | |
81 | |
82 /* flush any garbage in the Rx FIFO */ | |
83 for (count = 0; ; ) { | |
84 if (SIMREGS.stat & SIM_STAT_FEMPTY) | |
85 break; | |
86 (void) SIMREGS.drx; | |
87 if (++count >= 32) { | |
88 printf("ERROR: Rx FIFO flush does not end\n"); | |
89 return; | |
90 } | |
91 } | |
92 | |
93 #if 0 | |
94 /* lift the card out of reset! */ | |
95 SIMREGS.conf1 = conf1_reg |= SIM_CONF1_SRSTLEV; | |
96 #endif | |
97 } |