FreeCalypso > hg > tcs211-c139
annotate chipsetsw/drivers/drv_core/abb/abb.c @ 0:509db1a7b7b8
initial import: leo2moko-r1
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Mon, 01 Jun 2015 03:24:05 +0000 |
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rev | line source |
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0
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1 /**********************************************************************************/ |
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2 /* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION */ |
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3 /* */ |
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4 /* Property of Texas Instruments -- For Unrestricted Internal Use Only */ |
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5 /* Unauthorized reproduction and/or distribution is strictly prohibited. This */ |
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6 /* product is protected under copyright law and trade secret law as an */ |
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7 /* unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All */ |
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8 /* rights reserved. */ |
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9 /* */ |
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10 /* */ |
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11 /* Filename : abb.c */ |
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12 /* */ |
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13 /* Description : Functions to drive the ABB device. */ |
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14 /* The Serial Port Interface is used to connect the TI */ |
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15 /* Analog BaseBand (ABB). */ |
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16 /* It is assumed that the ABB is connected as the SPI */ |
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17 /* device 0. */ |
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18 /* */ |
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19 /* Author : Pascal PUEL */ |
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20 /* */ |
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21 /* Version number : 1.3 */ |
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22 /* */ |
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23 /* Date and time : 08/22/03 */ |
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24 /* */ |
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25 /* Previous delta : Creation */ |
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26 /* */ |
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27 /**********************************************************************************/ |
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28 |
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29 #include "l1sw.cfg" |
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30 |
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31 #include "chipset.cfg" |
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32 #include "board.cfg" |
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33 #include "rf.cfg" |
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34 #include "swconfig.cfg" |
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35 #include "sys.cfg" |
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36 #include "abb.h" |
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37 #include "l1_macro.h" |
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38 #include "l1_confg.h" |
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39 #include "clkm/clkm.h" // for wait_ARM_cycles function |
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40 #include "abb_inline.h" |
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41 #include "ulpd/ulpd.h" // for FRAME_STOP definition |
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42 #include "nucleus.h" // for NUCLEUS functions and types |
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43 #include "l1_types.h" |
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44 |
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45 #if (OP_L1_STANDALONE == 0) |
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46 #include "main/sys_types.h" |
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47 #include "rv/general.h" |
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48 #include "buzzer/buzzer.h" // for BZ_KeyBeep_OFF function |
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49 #else |
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50 #include "sys_types.h" |
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51 #endif |
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52 |
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53 #if (VCXO_ALGO == 1) |
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54 #include "l1_ctl.h" |
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55 #endif |
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56 |
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57 #if (RF_FAM == 35) |
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58 #include "l1_rf35.h" |
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59 #endif |
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60 |
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61 #if (RF_FAM == 12) |
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62 #include "tpudrv12.h" |
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63 #include "l1_rf12.h" |
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64 #endif |
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65 |
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66 #if (RF_FAM == 10) |
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67 #include "l1_rf10.h" |
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68 #endif |
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69 |
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70 #if (RF_FAM == 8) |
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71 #include "l1_rf8.h" |
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72 #endif |
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73 |
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74 #if (RF_FAM == 2) |
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75 #include "l1_rf2.h" |
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76 #endif |
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77 |
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78 #if (ABB_SEMAPHORE_PROTECTION) |
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79 |
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80 static NU_SEMAPHORE abb_sem; |
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81 |
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82 /*-----------------------------------------------------------------------*/ |
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83 /* ABB_Sem_Create() */ |
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84 /* */ |
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85 /* This function creates the Nucleus semaphore to protect ABB accesses */ |
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86 /* against preemption. */ |
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87 /* No check on the result. */ |
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88 /* */ |
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89 /*-----------------------------------------------------------------------*/ |
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90 void ABB_Sem_Create(void) |
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91 { |
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92 // create a semaphore with an initial count of 1 and with FIFO type suspension. |
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93 NU_Create_Semaphore(&abb_sem, "ABB_SEM", 1, NU_FIFO); |
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94 } |
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95 |
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96 #endif // ABB_SEMAPHORE_PROTECTION |
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97 |
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98 /*-----------------------------------------------------------------------*/ |
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99 /* ABB_Wait_IBIC_Access() */ |
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100 /* */ |
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101 /* This function waits for the first IBIC access. */ |
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102 /* */ |
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103 /*-----------------------------------------------------------------------*/ |
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104 void ABB_Wait_IBIC_Access(void) |
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105 { |
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106 #if (ANLG_FAM ==1) |
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107 // Wait 6 OSCAS cycles (100 KHz) for first IBIC access |
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108 // (i.e wait 60us + 10% security marge = 66us) |
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109 wait_ARM_cycles(convert_nanosec_to_cycles(66000)); |
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110 #elif ((ANLG_FAM ==2) || (ANLG_FAM == 3)) |
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111 // Wait 6 x 32 KHz clock cycles for first IBIC access |
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112 // (i.e wait 187us + 10% security marge = 210us) |
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113 wait_ARM_cycles(convert_nanosec_to_cycles(210000)); |
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114 #endif |
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115 } |
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116 |
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117 |
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118 |
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119 /*-----------------------------------------------------------------------*/ |
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120 /* ABB_Write_Register_on_page() */ |
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121 /* */ |
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122 /* This function manages all the spi serial transfer to write to an */ |
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diff
changeset
|
123 /* ABB register on a specified page. */ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
124 /* */ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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|
125 /*-----------------------------------------------------------------------*/ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
126 void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value) |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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|
127 { |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
128 volatile SYS_UWORD16 status; |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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|
129 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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130 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
131 SPI_Ready_for_WR |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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132 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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|
133 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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134 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
135 |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
136 // check if the semaphore has been correctly created and try to obtain it. |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
137 // if the semaphore cannot be obtained, the task is suspended and then resumed |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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|
138 // as soon as the semaphore is released. |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
139 if(&abb_sem != 0) |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
140 { |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
141 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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|
142 } |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
143 #endif // ABB_SEMAPHORE_PROTECTION |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
144 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
145 // set the ABB page for register access |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
146 ABB_SetPage(page); |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
147 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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148 // Write value in reg_id |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
149 ABB_WriteRegister(reg_id, value); |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
150 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
151 // set the ABB page for register access at page 0 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
152 ABB_SetPage(PAGE0); |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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|
153 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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154 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
155 // release the semaphore only if it has correctly been created. |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
156 if(&abb_sem != 0) |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
157 { |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
158 NU_Release_Semaphore(&abb_sem); |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
159 } |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
160 #endif // ABB_SEMAPHORE_PROTECTION |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
161 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
162 // Stop the SPI clock |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
163 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
164 SPI_CLK_DISABLE |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
165 #endif |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
166 } |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
167 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
168 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
169 /*-----------------------------------------------------------------------*/ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
170 /* ABB_Read_Register_on_page() */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
171 /* */ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
172 /* This function manages all the spi serial transfer to read one */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
173 /* ABB register on a specified page. */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
174 /* */ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
175 /* Returns the real data value of the register. */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
176 /* */ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
177 /*-----------------------------------------------------------------------*/ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
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|
178 SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id) |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
179 { |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
180 volatile SYS_UWORD16 status; |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
181 SYS_UWORD16 reg_val; |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
182 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
183 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
184 SPI_Ready_for_RDWR |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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185 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
186 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
187 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
188 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
189 // check if the semaphore has been correctly created and try to obtain it. |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
190 // if the semaphore cannot be obtained, the task is suspended and then resumed |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
191 // as soon as the semaphore is released. |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
192 if(&abb_sem != 0) |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
193 { |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
194 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
195 } |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
196 #endif // ABB_SEMAPHORE_PROTECTION |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
197 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
198 /* set the ABB page for register access */ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
199 ABB_SetPage(page); |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
200 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
201 /* Read selected ABB register */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
202 reg_val = ABB_ReadRegister(reg_id); |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
203 |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
204 /* set the ABB page for register access at page 0 */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
205 ABB_SetPage(PAGE0); |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
206 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
207 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
208 // release the semaphore only if it has correctly been created. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
209 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
210 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
211 NU_Release_Semaphore(&abb_sem); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
212 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
213 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
214 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
215 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
216 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
217 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
218 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
219 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
220 return (reg_val); // Return result |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
221 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
222 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
223 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
224 /* ABB_free_13M() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
225 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
226 /* This function sets the 13M clock working in ABB. A wait loop */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
227 /* is required to allow first slow access to ABB clock register. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
228 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
229 /* WARNING !! : this function must not be protected by semaphore !! */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
230 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
231 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
232 void ABB_free_13M(void) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
233 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
234 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
235 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
236 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
237 SPI_Ready_for_WR |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
238 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
239 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
240 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
241 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
242 // This transmission frees the CLK13 in ABB. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
243 ABB_WriteRegister(TOGBR2, 0x08); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
244 |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
245 // Wait for first IBIC access |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
246 ABB_Wait_IBIC_Access(); |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
247 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
248 // SW Workaround : This transmission has to be done twice. |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
249 ABB_WriteRegister(TOGBR2, 0x08); |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
250 |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
251 // Wait for first IBIC access |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
252 ABB_Wait_IBIC_Access(); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
253 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
254 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
255 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
256 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
257 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
258 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
259 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
260 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
261 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
262 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
263 /* ABB_stop_13M() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
264 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
265 /* This function stops the 13M clock in ABB. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
266 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
267 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
268 void ABB_stop_13M(void) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
269 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
270 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
271 |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
272 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
273 SPI_Ready_for_WR |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
274 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
275 |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
276 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
277 |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
278 // Set ACTIVMCLK = 0. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
279 ABB_WriteRegister(TOGBR2, 0x04); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
280 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
281 // Wait for first IBIC access |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
282 ABB_Wait_IBIC_Access(); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
283 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
284 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
285 #ifdef SPI_CLK_LOW_POWER |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
286 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
287 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
288 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
289 |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
290 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
291 |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
292 /*------------------------------------------------------------------------*/ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
293 /* ABB_Read_Status() */ |
509db1a7b7b8
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
294 /* */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
295 /* This function reads and returns the value of VRPCSTS ABB register. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
296 /* */ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
297 /*------------------------------------------------------------------------*/ |
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Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
298 SYS_UWORD16 ABB_Read_Status(void) |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
299 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
300 volatile SYS_UWORD16 status; |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
301 SYS_UWORD16 reg_val; |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
302 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
303 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
304 SPI_Ready_for_WR |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
305 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
306 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
307 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
308 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
309 // check if the semaphore has been correctly created and try to obtain it. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
310 // if the semaphore cannot be obtained, the task is suspended and then resumed |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
311 // as soon as the semaphore is released. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
312 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
313 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
314 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
315 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
316 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
317 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
318 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
319 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
320 #if (ANLG_FAM == 1) || (ANLG_FAM == 2) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
321 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
322 reg_val = ABB_ReadRegister(VRPCSTS); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
323 #elif (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
324 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
325 reg_val = ABB_ReadRegister(VRPCCFG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
326 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
327 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
328 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
329 // release the semaphore only if it has correctly been created. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
330 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
331 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
332 NU_Release_Semaphore(&abb_sem); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
333 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
334 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
335 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
336 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
337 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
338 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
339 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
340 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
341 return (reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
342 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
343 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
344 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
345 /* ABB_on() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
346 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
347 /* This function configures ABB registers to work in ON condition */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
348 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
349 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
350 void ABB_on(SYS_UWORD16 modules, SYS_UWORD8 bRecoveryFlag) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
351 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
352 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
353 #if ((ANLG_FAM ==2) || (ANLG_FAM == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
354 SYS_UWORD32 reg; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
355 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
356 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
357 // a possible cause of the recovery is that ABB is on Oscas => switch from Oscas to CLK13 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
358 if (bRecoveryFlag) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
359 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
360 // RESTITUTE 13MHZ CLOCK TO ABB |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
361 //--------------------------------------------------- |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
362 ABB_free_13M(); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
363 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
364 // RESTITUTE 13MHZ CLOCK TO ABB AGAIN (C.F. BUG1719) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
365 //--------------------------------------------------- |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
366 ABB_free_13M(); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
367 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
368 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
369 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
370 SPI_Ready_for_RDWR |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
371 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
372 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
373 #if (ABB_SEMAPHORE_PROTECTION == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
374 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
375 // check if the semaphore has been correctly created and try to obtain it. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
376 // if the semaphore cannot be obtained, the task is suspended and then resumed |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
377 // as soon as the semaphore is released. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
378 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
379 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
380 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
381 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
382 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
383 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
384 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
385 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
386 // This transmission disables MADC,AFC,VDL,VUL modules. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
387 ABB_WriteRegister(TOGBR1, 0x0155); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
388 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
389 #if (ANLG_FAM == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
390 // This transmission disables Band gap fast mode Enable BB charge. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
391 ABB_WriteRegister(VRPCCTL2, 0x1fc); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
392 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
393 /* *********** DC/DC enabling selection ************************************************************** */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
394 // This transmission changes the register page in OMEGA for usp to pg1. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
395 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
396 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
397 /* Insert here accesses to modify DC/DC parameters. Default is a switching frequency of 240 Khz */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
398 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
399 SYS_UWORD8 vrpcctrl3_data; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
400 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
401 #if (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
402 vrpcctrl3_data = 0x007d; // core voltage 1.4V for C035 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
403 #else |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
404 vrpcctrl3_data = 0x00bd; // core voltage 1.8V for C05 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
405 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
406 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
407 if(modules & DCDC) // check if the DCDC is enabled |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
408 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
409 vrpcctrl3_data |= 0x0002; // set DCDCEN |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
410 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
411 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
412 // This access disables the DCDC. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
413 ABB_WriteRegister(VRPCCTRL3, vrpcctrl3_data); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
414 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
415 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
416 /* ************************ SELECTION OF TEST MODE FOR ABB **************************************** */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
417 /* This test configuration allows visibility on BULENA,BULON,BDLON,BDLENA on test pins */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
418 /* ***************************************************************************************************/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
419 #if (BOARD==6)&& (ANLG_FAM==1) //BUG01967 to remove access to TAPCTRL (EVA4 board and Nausica) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
420 // This transmission enables Omega test register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
421 ABB_WriteRegister(TAPCTRL, 0x01); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
422 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
423 // This transmission select Omega test instruction. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
424 ABB_WriteRegister(TAPREG, TSPTEST1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
425 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
426 // This transmission disables Omega test register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
427 ABB_WriteRegister(TAPCTRL, 0x00); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
428 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
429 /* *************************************************************************************************** */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
430 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
431 if (!bRecoveryFlag) // Check recovery status from L1, prevent G23 SIM issue |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
432 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
433 // This transmission changes SIM power supply to 3 volts. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
434 ABB_WriteRegister(VRPCCTRL1, 0x45); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
435 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
436 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
437 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
438 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
439 // This transmission enables selected OMEGA modules. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
440 ABB_WriteRegister(TOGBR1, (modules & ~DCDC) >> 6); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
441 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
442 if(modules & MADC) // check if the ADC is enabled |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
443 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
444 // This transmission connects the resistive divider to MB and BB. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
445 ABB_WriteRegister(BCICTL1, 0x0005); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
446 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
447 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
448 // Restore the ABB checks and debouncing if start on TESTRESETZ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
449 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
450 // This transmission changes the register page in the ABB for usp to pg1. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
451 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
452 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
453 // This transmission sets the AFCCK to CKIN/2. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
454 ABB_WriteRegister(AFCCTLADD, 0x01); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
455 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
456 // This transmission enables the tapreg. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
457 ABB_WriteRegister(TAPCTRL, 0x01); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
458 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
459 // This transmission enables access to page 2. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
460 ABB_WriteRegister(TAPREG, 0x01b); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
461 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
462 // This transmission changes the register page in the ABB for usp to pg2. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
463 ABB_SetPage(PAGE2); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
464 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
465 #if (ANLG_FAM == 2) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
466 // Restore push button environment |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
467 ABB_WriteRegister(0x3C, 0x07); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
468 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
469 #elif (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
470 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
471 // Restore push button environment |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
472 ABB_WriteRegister(0x3C, 0xBF); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
473 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
474 /* ************************ SELECTION OF BBCFG CONFIG FOR ABB 3 PG1_0 *******************************/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
475 #if (ANLG_PG == S_PG_10) // SYREN PG1.0 ON ESAMPLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
476 ABB_WriteRegister(BBCFG, C_BBCFG); // Initialize transmit register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
477 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
478 // This transmission enables access to page 0. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
479 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
480 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
481 // reset bit MSKINT1 , if set by TESTRESET |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
482 reg=ABB_ReadRegister(VRPCSTS) & 0xffe; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
483 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
484 ABB_WriteRegister(VRPCSTS, reg); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
485 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
486 ABB_SetPage(PAGE2); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
487 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
488 // Restore default for BG behavior in sleep mode |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
489 ABB_WriteRegister(VRPCAUX, 0xBF); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
490 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
491 // Restore default for deboucing length |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
492 ABB_WriteRegister(VRPCLDO, 0x00F); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
493 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
494 // Restore default for INT1 generation, wait time in switch on, checks in switch on |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
495 ABB_WriteRegister(VRPCABBTST, 0x0002); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
496 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
497 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
498 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
499 // This transmission changes the register page in the ABB for usp to pg1. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
500 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
501 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
502 // This transmission sets tapinst to id code. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
503 ABB_WriteRegister(TAPREG, 0x0001); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
504 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
505 // This transmission disables TAPREG access. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
506 ABB_WriteRegister(TAPCTRL, 0x00); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
507 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
508 // enable BB battery charge BCICONF register, enable test mode to track BDLEN and BULEN windows |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
509 // This transmission enables BB charge and BB bridge connection for BB measurements. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
510 ABB_WriteRegister(BCICONF, 0x060); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
511 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
512 /* ************************ SELECTION OF BBCFG CONFIG FOR ABB 3 PG2_0 *******************************/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
513 #if (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
514 #if (ANLG_PG == S_PG_20) // SYREN PG2.0 ON EVACONSO |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
515 ABB_WriteRegister(BBCFG, C_BBCFG); // Initialize transmit register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
516 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
517 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
518 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
519 /* ************************ SELECTION OF TEST MODE FOR ABB ******************************************/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
520 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
521 /* ****************************************************************************************************/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
522 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
523 // This transmission enables the tapreg. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
524 ABB_WriteRegister(TAPCTRL, 0x01); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
525 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
526 // This transmission select ABB test instruction. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
527 ABB_WriteRegister(TAPREG, TSPEN); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
528 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
529 // This transmission changes the register page in ABB for usp to pg0. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
530 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
531 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
532 // This transmission enables selected ABB modules. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
533 ABB_WriteRegister(TOGBR1, modules >> 6); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
534 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
535 // enable MB & BB resistive bridges for measurements |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
536 if(modules & MADC) // check if the ADC is enabled |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
537 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
538 // This transmission connects the resistive divider to MB and BB. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
539 ABB_WriteRegister(BCICTL1, 0x0001); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
540 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
541 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
542 /********* Sleep definition part ******************/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
543 // This transmission changes the register page in the ABB for usp to pg1. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
544 #if (ANLG_FAM == 2) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
545 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
546 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
547 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
548 reg = ABB_ReadRegister(VRPCCFG) & 0x1e0; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
549 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
550 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg)); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
551 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
552 // update the ABB mask sleep register (regulator disabled in deep sleep), and clear previous mask value. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
553 reg = ABB_ReadRegister(VRPCMSK) & 0x1e0; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
554 ABB_WriteRegister(VRPCMSK, (MASK_SLEEP_MODE | reg)); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
555 #elif (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
556 Syren_Sleep_Config(NORMAL_SLEEP,SLEEP_BG,SLPDLY); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
557 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
558 // This transmission changes the register page in the ABB for usp to pg0. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
559 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
560 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
561 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
562 // SW workaround for initialization of the audio parts of the ABB to avoid white noise |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
563 // C.f. BUG1941 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
564 // Set VDLR and VULR bits |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
565 // Write TOGBR1 register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
566 // This transmission enables selected ABB modules. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
567 ABB_WriteRegister(TOGBR1, 0x0A); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
568 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
569 // wait for 1 ms |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
570 wait_ARM_cycles(convert_nanosec_to_cycles(1000000)); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
571 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
572 // Reset VDLS and VULS bits |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
573 // Write TOGBR1 register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
574 // This transmission enables selected ABB modules. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
575 ABB_WriteRegister(TOGBR1, 0x05); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
576 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
577 #if (ABB_SEMAPHORE_PROTECTION == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
578 // release the semaphore only if it has correctly been created. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
579 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
580 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
581 NU_Release_Semaphore(&abb_sem); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
582 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
583 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
584 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
585 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
586 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
587 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
588 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
589 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
590 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
591 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
592 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
593 /*-----------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
594 /* ABB_Read_ADC() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
595 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
596 /* This function manages all the spi serial transfer to read all the */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
597 /* ABB ADC conversion channels. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
598 /* Stores the result in Buff parameter. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
599 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
600 /*-----------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
601 void ABB_Read_ADC(SYS_UWORD16 *Buff) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
602 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
603 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
604 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
605 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
606 SPI_Ready_for_RDWR |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
607 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
608 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
609 #if (ABB_SEMAPHORE_PROTECTION == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
610 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
611 // check if the semaphore has been correctly created and try to obtain it. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
612 // if the semaphore cannot be obtained, the task is suspended and then resumed |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
613 // as soon as the semaphore is released. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
614 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
615 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
616 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
617 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
618 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
619 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
620 // This transmission changes the register page in the ABB for usp to pg0. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
621 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
622 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
623 /* Read all ABB ADC registers */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
624 *Buff++ = ABB_ReadRegister(VBATREG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
625 *Buff++ = ABB_ReadRegister(VCHGREG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
626 *Buff++ = ABB_ReadRegister(ICHGREG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
627 *Buff++ = ABB_ReadRegister(VBKPREG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
628 *Buff++ = ABB_ReadRegister(ADIN1REG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
629 *Buff++ = ABB_ReadRegister(ADIN2REG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
630 *Buff++ = ABB_ReadRegister(ADIN3REG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
631 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
632 #if (ANLG_FAM ==1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
633 *Buff++ = ABB_ReadRegister(ADIN4XREG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
634 *Buff++ = ABB_ReadRegister(ADIN5YREG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
635 #elif (ANLG_FAM ==2) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
636 *Buff++ = ABB_ReadRegister(ADIN4REG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
637 #elif (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
638 *Buff++ = ABB_ReadRegister(ADIN4REG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
639 *Buff++ = ABB_ReadRegister(ADIN5REG); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
640 #endif // ANLG_FAM |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
641 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
642 #if (ABB_SEMAPHORE_PROTECTION == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
643 // release the semaphore only if it has correctly been created. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
644 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
645 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
646 NU_Release_Semaphore(&abb_sem); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
647 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
648 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
649 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
650 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
651 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
652 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
653 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
654 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
655 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
656 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
657 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
658 /*-----------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
659 /* ABB_Conf_ADC() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
660 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
661 /* This function manages all the spi serial transfer to: */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
662 /* - select the ABB ADC channels to be converted */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
663 /* - enable/disable EOC interrupt */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
664 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
665 /*-----------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
666 void ABB_Conf_ADC(SYS_UWORD16 Channels, SYS_UWORD16 ItVal) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
667 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
668 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
669 SYS_UWORD16 reg_val; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
670 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
671 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
672 SPI_Ready_for_RDWR |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
673 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
674 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
675 #if (ABB_SEMAPHORE_PROTECTION == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
676 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
677 // check if the semaphore has been correctly created and try to obtain it. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
678 // if the semaphore cannot be obtained, the task is suspended and then resumed |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
679 // as soon as the semaphore is released. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
680 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
681 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
682 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
683 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
684 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
685 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
686 // This transmission changes the register page in the ABB for usp to pg0. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
687 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
688 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
689 /* select ADC channels to be converted */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
690 #if (ANLG_FAM == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
691 ABB_WriteRegister(MADCCTRL1, Channels); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
692 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
693 ABB_WriteRegister(MADCCTRL, Channels); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
694 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
695 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
696 reg_val = ABB_ReadRegister(ITMASK); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
697 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
698 // This transmission configure the End Of Conversion IT without modifying other bits in the same register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
699 if(ItVal == EOC_INTENA) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
700 ABB_WriteRegister(ITMASK, reg_val & EOC_INTENA); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
701 else if(ItVal == EOC_INTMASK) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
702 ABB_WriteRegister(ITMASK, reg_val | EOC_INTMASK); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
703 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
704 #if (ABB_SEMAPHORE_PROTECTION == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
705 // release the semaphore only if it has correctly been created. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
706 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
707 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
708 NU_Release_Semaphore(&abb_sem); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
709 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
710 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
711 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
712 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
713 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
714 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
715 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
716 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
717 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
718 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
719 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
720 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
721 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
722 /* ABB_sleep() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
723 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
724 /* This function disables the DCDC and returns to PAGE 0. It stops then */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
725 /* the 13MHz clock in ABB. A wait loop s required to allow */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
726 /* first slow access to ABB clock register. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
727 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
728 /* WARNING !! : this function must not be protected by semaphore !! */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
729 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
730 /* Returns AFC value. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
731 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
732 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
733 SYS_UWORD32 ABB_sleep(SYS_UWORD8 sleep_performed, SYS_WORD16 afc) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
734 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
735 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
736 SYS_UWORD32 afcout_index; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
737 volatile SYS_UWORD16 nb_it; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
738 SYS_UWORD16 reg_val; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
739 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
740 // table for AFC allowed values during Sleep mode. First 5th elements |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
741 // are related to positive AFC values, last 5th to negative ones. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
742 SYS_UWORD32 Afcout_T[10]= {0x0f,0x1f,0x3f,0x7f,0xff,0x00,0x01,0x03,0x07,0x0f}; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
743 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
744 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
745 SPI_Ready_for_RDWR |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
746 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
747 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
748 // COMPUTATION AND PROGRAMMING OF AFC VALUE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
749 //--------------------------------------------------- |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
750 if(afc & 0x1000) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
751 afcout_index = ((afc + 512)>>10) + 1; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
752 else |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
753 afcout_index = (afc + 512)>>10; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
754 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
755 if (sleep_performed == FRAME_STOP) // Big sleep |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
756 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
757 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
758 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP //////////////////////////// |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
759 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
760 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
761 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
762 else // Deep sleep |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
763 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
764 #if(ANLG_FAM == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
765 // SELECTION OF AFC TEST MODE FOR OMEGA |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
766 //--------------------------------------------------- |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
767 // This test configuration allows access on the AFCOUT register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
768 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
769 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
770 // This transmission enables OMEGA test register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
771 ABB_WriteRegister(TAPCTRL, 0x01); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
772 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
773 // This transmission selects OMEGA test instruction. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
774 ABB_WriteRegister(TAPREG, AFCTEST); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
775 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
776 // Set AFCOUT to 0. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
777 ABB_WriteRegister(AFCOUT, 0x00 >> 6); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
778 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
779 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
780 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
781 #elif (ANLG_FAM == 2) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
782 // This configuration allows access on the AFCOUT register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
783 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
784 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
785 // Read AFCCTLADD value and enable USP access to AFCOUT register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
786 reg_val = (ABB_ReadRegister(AFCCTLADD) | 0x04); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
787 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
788 ABB_WriteRegister(AFCCTLADD, reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
789 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
790 // Set AFCOUT to 0. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
791 ABB_WriteRegister(AFCOUT, 0x00); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
792 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
793 // Read BCICONF value and cut the measurement bridge of BB cut the BB charge. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
794 reg_val = ABB_ReadRegister(BCICONF) & 0x039f; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
795 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
796 ABB_WriteRegister(BCICONF, reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
797 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
798 // Disable the ABB test mode |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
799 ABB_WriteRegister(TAPCTRL, 0x00); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
800 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
801 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
802 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
803 // Read BCICTL1 value and cut the measurement bridge of MB. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
804 reg_val = ABB_ReadRegister(BCICTL1) & 0x03fe; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
805 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
806 ABB_WriteRegister(BCICTL1, reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
807 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
808 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
809 #if (ANLG_FAM == 3) // Nothing to be done as MB and BB measurement bridges are automatically disconnected |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
810 // in Syren during sleep mode. BB charge stays enabled |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
811 ABB_SetPage(PAGE1); // Initialize transmit reg_num. This transmission |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
812 // change the register page in IOTA for usp to pg1 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
813 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
814 ABB_WriteRegister(TAPCTRL, 0x00); // Disable Syren test mode |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
815 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
816 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
817 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
818 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
819 // switch off MADC, AFC, AUXDAC, VOICE. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
820 ABB_WriteRegister(TOGBR1, 0x155); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
821 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
822 // Switch off Analog supply LDO |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
823 //----------------------------- |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
824 #if (ANLG_FAM == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
825 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
826 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
827 // Read VRPCCTL3 register value and switch off VR3. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
828 reg_val = ABB_ReadRegister(VRPCCTRL3) & 0x3df; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
829 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
830 ABB_WriteRegister(VRPCCTRL3, reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
831 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
832 #elif (ANLG_FAM == 2) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
833 // Read VRPCSTS register value and extract status of meaningfull inputs. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
834 reg_val = ABB_ReadRegister(VRPCSTS) & 0x0070; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
835 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
836 if (reg_val == 0x30) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
837 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
838 // start the SLPDLY counter in order to switch the ABB in sleep mode. This transmission sets IOTA sleep bit. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
839 ABB_WriteRegister(VRPCDEV, 0x02); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
840 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
841 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
842 // Dummy transmission to clean of ABB bus. This transmission accesses IOTA address 0 in "read". |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
843 ABB_WriteRegister(0x0000 | 0x0001, 0x0000); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
844 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
845 #elif (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
846 // In Syren there is no need to check for VRPCCFG as wake up prioritys are changed |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
847 // start the SLPDLY counter in order to switch the ABB in sleep mode |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
848 ABB_WriteRegister(VRPCDEV,0x02); // Initialize transmit reg_num. This transmission |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
849 // set Syren sleep bit |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
850 /* |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
851 // Dummy transmission to clean of ABB bus. This transmission accesses SYREN address 0 in "read". |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
852 ABB_WriteRegister(0x0000 | 0x0001, 0x0000); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
853 */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
854 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
855 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
856 // Switch to low frequency clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
857 ABB_stop_13M(); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
858 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
859 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
860 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
861 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
862 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
863 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
864 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
865 #if (OP_L1_STANDALONE == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
866 #if (CHIPSET == 12) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
867 // GPIO_InitAllPull(ALL_ONE); // enable all GPIO internal pull |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
868 // workaround to set APLL_DIV_CLK( internal PU) at high level |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
869 // by default APLL_DIV_CLK is low pulling 80uA on VRIO |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
870 // *(SYS_UWORD16*) (0xFFFFFD90)= 0x01;//CNTL_APLL_DIV_CLK -> APLL_CLK_DIV != 0 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
871 // *(SYS_UWORD16*) (0xFFFEF030)= 0x10;// DPLL mode |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
872 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
873 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
874 return(Afcout_T[afcout_index]); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
875 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
876 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
877 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
878 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
879 /* ABB_wakeup() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
880 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
881 /* This function sets the 13MHz clock working in ABB. A wait loop */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
882 /* is required to allow first slow access to ABB clock register. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
883 /* Then it re-enables DCDC and returns to PAGE 0. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
884 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
885 /* WARNING !! : this function must not be protected by semaphore !! */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
886 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
887 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
888 void ABB_wakeup(SYS_UWORD8 sleep_performed, SYS_WORD16 afc) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
889 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
890 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
891 SYS_UWORD16 reg_val; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
892 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
893 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
894 SPI_Ready_for_RDWR |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
895 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
896 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
897 if (sleep_performed == FRAME_STOP) // Big sleep |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
898 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
899 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
900 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP WAKEUP //////////////////////////// |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
901 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
902 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
903 else // Deep sleep |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
904 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
905 #if (OP_L1_STANDALONE == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
906 #if (CHIPSET == 12) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
907 // restore context from |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
908 // workaround to set APLL_DIV_CLK( internal PU) at high level |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
909 // by default APLL_DIV_CLK is low pulling 80uA on VRIO |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
910 // *(SYS_UWORD16*) (0xFFFFFD90)= 0x00;//CNTL_APLL_DIV_CLK -> APLL_DIV_CLK != 0 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
911 // *(SYS_UWORD16*) (0xFFFEF030)= 0x00;// DPLL mode |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
912 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
913 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
914 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
915 // Restitutes 13MHZ Clock to ABB |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
916 ABB_free_13M(); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
917 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
918 // Switch ON Analog supply LDO |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
919 #if (ANLG_FAM == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
920 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
921 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
922 // Read VRPCCTL3 register value and switch on VR3. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
923 reg_val = ABB_ReadRegister(VRPCCTRL3) | 0x020; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
924 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
925 ABB_WriteRegister(VRPCCTRL3, reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
926 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
927 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
928 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
929 // This transmission switches on MADC, AFC. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
930 ABB_WriteRegister(TOGBR1, 0x280); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
931 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
932 // This transmission sets the AUXAFC2. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
933 ABB_WriteRegister(AUXAFC2, ((afc>>10) & 0x7)); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
934 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
935 // This transmission sets the AUXAFC1. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
936 ABB_WriteRegister(AUXAFC1, (afc & 0x3ff)); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
937 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
938 #if (ANLG_FAM == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
939 // Remove AFC test mode |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
940 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
941 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
942 // This transmission select Omega test instruction. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
943 ABB_WriteRegister(TAPREG, TSPTEST1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
944 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
945 // Disable test mode selection |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
946 // This transmission disables Omega test register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
947 ABB_WriteRegister(TAPCTRL, 0x00 >> 6); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
948 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
949 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
950 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
951 #elif (ANLG_FAM == 2) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
952 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
953 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
954 // Read AFCCTLADD register value and disable USP access to AFCOUT register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
955 reg_val = ABB_ReadRegister(AFCCTLADD) & ~0x04; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
956 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
957 ABB_WriteRegister(AFCCTLADD, reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
958 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
959 // Read BCICONF register value and enable BB measurement bridge enable BB charge. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
960 reg_val = ABB_ReadRegister(BCICONF) | 0x0060; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
961 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
962 ABB_WriteRegister(BCICONF, reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
963 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
964 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
965 /* *************************************************************************************************** */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
966 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
967 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
968 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val)); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
969 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
970 // Enable the ABB test mode |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
971 ABB_WriteRegister(TAPCTRL, 0x01); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
972 ABB_WriteRegister(TAPREG, TSPEN); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
973 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
974 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
975 // Read BCICTL1 register value and enable MB measurement bridge and cut the measurement bridge of MB. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
976 reg_val = ABB_ReadRegister(BCICTL1) | 0x0001; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
977 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
978 ABB_WriteRegister(BCICTL1, reg_val); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
979 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
980 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
981 #if (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
982 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
983 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
984 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
985 /* *************************************************************************************************** */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
986 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
987 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
988 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val)); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
989 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
990 /* ************************ SELECTION OF TEST MODE FOR ABB=3 *****************************************/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
991 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
992 /* ****************************************************************************************************/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
993 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
994 ABB_WriteRegister(TAPCTRL, 0x01); // Initialize the transmit register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
995 // This transmission enables IOTA test register |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
996 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
997 ABB_WriteRegister(TAPREG, TSPEN); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
998 // This transmission select IOTA test instruction |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
999 // This transmission select IOTA test instruction |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1000 /**************************************************************************************************** */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1001 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1002 ABB_SetPage(PAGE0); // Initialize transmit reg_num. This transmission |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1003 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1004 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1005 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1006 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1007 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1008 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1009 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1010 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1011 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1012 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1013 /* ABB_wa_VRPC() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1014 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1015 /* This function initializes the VRPCCTRL1 or VRPCSIM register */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1016 /* according to the ABB used. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1017 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1018 /*------------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1019 void ABB_wa_VRPC(SYS_UWORD16 value) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1020 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1021 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1022 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1023 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1024 SPI_Ready_for_WR |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1025 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1026 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1027 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1028 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1029 // check if the semaphore has been correctly created and try to obtain it. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1030 // if the semaphore cannot be obtained, the task is suspended and then resumed |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1031 // as soon as the semaphore is released. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1032 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1033 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1034 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1035 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1036 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1037 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1038 ABB_SetPage(PAGE1); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1039 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1040 #if (ANLG_FAM == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1041 // This transmission initializes the VRPCCTL1 register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1042 ABB_WriteRegister(VRPCCTRL1, value); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1043 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1044 #elif (ANLG_FAM == 2) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1045 // This transmission initializes the VRPCSIM register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1046 ABB_WriteRegister(VRPCSIM, value); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1047 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1048 #elif (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1049 // This transmission initializes the VRPCSIMR register. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1050 ABB_WriteRegister(VRPCSIMR, value); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1051 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1052 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1053 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1054 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1055 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1056 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1057 // release the semaphore only if it has correctly been created. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1058 if(&abb_sem != 0) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1059 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1060 NU_Release_Semaphore(&abb_sem); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1061 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1062 #endif // ABB_SEMAPHORE_PROTECTION |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1063 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1064 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1065 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1066 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1067 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1068 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1069 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1070 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1071 /*-----------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1072 /* ABB_Write_Uplink_Data() */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1073 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1074 /* This function uses the SPI to write to ABB uplink buffer. */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1075 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1076 /*-----------------------------------------------------------------------*/ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1077 void ABB_Write_Uplink_Data(SYS_UWORD16 *TM_ul_data) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1078 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1079 SYS_UWORD8 i; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1080 volatile SYS_UWORD16 status; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1081 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1082 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1083 SPI_Ready_for_WR |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1084 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1085 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1086 // Select Page 0 for TOGBR2 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1087 ABB_SetPage(PAGE0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1088 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1089 // Initialize pointer of burst buffer 1 : IBUFPTR is bit 10 of TOGBR2 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1090 ABB_WriteRegister(TOGBR2, 0x10); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1091 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1092 // Clear, assuming that it works like IBUFPTR of Vega |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1093 ABB_WriteRegister(TOGBR2, 0x0); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1094 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1095 // Write the ramp data |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1096 for (i=0;i<16;i++) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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1097 ABB_WriteRegister(BULDATA1_2, TM_ul_data[i]>>6); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1098 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1099 // Stop the SPI clock |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1100 #ifdef SPI_CLK_LOW_POWER |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1101 SPI_CLK_DISABLE |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1102 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1103 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1104 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1105 //////////////////////// IDEV-INLO integration of sleep mode for Syren /////////////////////////////////////// |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1106 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1107 #if (ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1108 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1109 // Syren Sleep configuration function -------------------------- |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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1110 void Syren_Sleep_Config(SYS_UWORD16 sleep_type,SYS_UWORD16 bg_select, SYS_UWORD16 sleep_delay) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1111 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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1112 volatile SYS_UWORD16 status,sl_ldo_stat; |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1113 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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1114 ABB_SetPage(PAGE1); // Initialize transmit register. This transmission |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1115 // change the register page in ABB for usp to pg1 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1116 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1117 ABB_WriteRegister(VRPCCFG, sleep_delay); // write delay value |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1118 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1119 sl_ldo_stat = ((sleep_type<<9|bg_select<<8) & 0x0374); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1120 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1121 ABB_WriteRegister(VRPCMSKSLP, sl_ldo_stat); // write sleep ldo configuration |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1122 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1123 ABB_SetPage(PAGE0); // Initialize transmit register. This transmission |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1124 // change the register page in ABB for usp to pg0 |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1125 } |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1126 #endif |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1127 |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1128 |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1129 #if (OP_L1_STANDALONE == 0) |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1130 /*-----------------------------------------------------------------------*/ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1131 /* ABB_Power_Off() */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1132 /* */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1133 /* This function uses the SPI to switch off the ABB. */ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1134 /* */ |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1135 /*-----------------------------------------------------------------------*/ |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1136 void ABB_Power_Off(void) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1137 { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1138 // Wait until all necessary actions are performed (write in FFS, etc...) to power-off the board (empirical value - 30 ticks). |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1139 NU_Sleep (30); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1140 |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1141 // Wait also until <ON/OFF> key is released. |
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initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1142 // This is needed to avoid, if the power key is pressed for a long time, to switch |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1143 // ON-switch OFF the mobile, until the power key is released. |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1144 #if((ANLG_FAM == 1) || (ANLG_FAM == 2)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1145 while ((ABB_Read_Status() & ONREFLT) == PWR_OFF_KEY_PRESSED) { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1146 #elif(ANLG_FAM == 3) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1147 while ((ABB_Read_Register_on_page(PAGE1, VRPCCFG) & PWOND) == PWR_OFF_KEY_PRESSED) { |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1148 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1149 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1150 NU_Sleep (1); } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1151 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1152 BZ_KeyBeep_OFF(); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1153 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1154 #if(ANLG_FAM == 1) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1155 ABB_Write_Register_on_page(PAGE0, VRPCCTL2, 0x00EE); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1156 #elif((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1157 ABB_Write_Register_on_page(PAGE0, VRPCDEV, 0x0001); |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1158 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1159 } |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1160 #endif |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1161 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1162 |
509db1a7b7b8
initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1163 |