FreeCalypso > hg > tcs211-l1-reconst
changeset 129:419f638cf03b
l1_pwmgr.c: l1s_sleep_manager(): logic apparently reconstructed,
but the compiler's register allocation still does not match
| author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
|---|---|
| date | Sat, 14 May 2016 06:28:44 +0000 |
| parents | a2f9560c1cf1 |
| children | c4b922f2b593 |
| files | chipsetsw/layer1/cfile/l1_pwmgr.c |
| diffstat | 1 files changed, 13 insertions(+), 163 deletions(-) [+] |
line wrap: on
line diff
--- a/chipsetsw/layer1/cfile/l1_pwmgr.c Fri May 13 19:18:35 2016 +0000 +++ b/chipsetsw/layer1/cfile/l1_pwmgr.c Sat May 14 06:28:44 2016 +0000 @@ -775,26 +775,12 @@ UWORD32 sleep_time = l1s.actual_time.fn; #endif -#if (GSM_IDLE_RAM != 0) - T_L1S_GSM_IDLE_INTRAM * gsm_idle_ram_ctl; - BOOL flag_traffic_controller_state = 0; - gsm_idle_ram_ctl = &(l1s.gsm_idle_ram_ctl); - - #if (AUDIO_TASK == 1) - gsm_idle_ram_ctl->l1s_full_exec = l1s.l1_audio_it_com; - #endif - - if (gsm_idle_ram_ctl->l1s_full_exec == TRUE) - return; -#endif - if (l1_config.pwr_mngt == PWR_MNGT) { // Power management is enabled - WORD32 min_time, OSload, HWtimer,wake_up_time,min_time_gauging; + WORD32 min_time, HWtimer,wake_up_time,min_time_gauging; UWORD32 sleep_mode; WORD32 afc_fix; - UWORD32 uw32_store_next_time; static UWORD32 previous_sleep = FRAME_STOP; #if (W_A_CALYPSO_PLUS_SPR_19599 == 1) BOOL extended_page_mode_state = 0; //Store state of extended page mode @@ -816,21 +802,8 @@ //================================================= sleep_mode = Cust_check_system(); - #if (GSM_IDLE_RAM != 0) - //================================================= - // check System (SIM, UART, LDC ..... ) - //================================================= - gsm_idle_ram_ctl->sleep_mode = sleep_mode; - #endif - if (sleep_mode == DO_NOT_SLEEP) - { - #if (GSM_IDLE_RAM != 0) - gsm_idle_ram_ctl->os_load = 0; - gsm_idle_ram_ctl->hw_timer = 0; - #endif // GSM_IDLE_RAM return; - } #if (CODE_VERSION != SIMULATION) //================================================= @@ -845,45 +818,15 @@ INT_DisableIRQ(); #endif // NOT SIMULATION -#if (OP_L1_STANDALONE == 0) - /*GC_Sleep(); OMAPS00134004*/ -#endif //================================================= // check OS loading //================================================= - OSload = OS_get_inactivity_ticks(); - #if 0 /* FreeCalypso TCS211 reconstruction */ - if ((OSload >= 0) && (OSload <= MIN_SLEEP_TIME)){ - l1_pwmgr_debug.fail_id = FAIL_SLEEP_DUE_TO_OSLOAD; - l1_pwmgr_debug.fail_ret_val = OSload; - } - #endif + min_time = OS_get_inactivity_ticks(); //================================================= // check HW Timers loading //================================================= HWtimer= l1s_get_HWTimers_ticks(); - #if 0 /* FreeCalypso TCS211 reconstruction */ - if (HWtimer == 0){ - l1_pwmgr_debug.fail_id = FAIL_SLEEP_DUE_TO_HWTIMER; - l1_pwmgr_debug.fail_ret_val = 0; - } - #endif - - #if (GSM_IDLE_RAM != 0) - //================================================= - // check OS loading - //================================================= - gsm_idle_ram_ctl->os_load = OSload; - - //================================================= - // check HW Timers loading - //================================================= - gsm_idle_ram_ctl->hw_timer = HWtimer; - #endif // GSM_IDLE_RAM - - if ((OSload > 0) && (OSload <= MIN_SLEEP_TIME)) - OSload =0; //================================================= // check next gauging task for Packet Idle @@ -893,13 +836,6 @@ #else min_time_gauging = -1; // not used #endif - #if 0 /* FreeCalypso TCS211 reconstruction */ - if (min_time_gauging == 0){ - l1_pwmgr_debug.fail_id = FAIL_SLEEP_DUE_TO_MINTIMEGAUGING; - l1_pwmgr_debug.fail_ret_val = 0; - } - #endif // NOT SIMULATION - #if (OP_BT == 1) hci_ll_status = hci_ll_ok_for_sleep(); @@ -909,10 +845,10 @@ // in case big sleep is choosen (sleep mode == FRAME_STOP) because of UART or SIM, // return and wait end of this activity (few TDMA frames) then check on next TDMA frames // if MS can go in deep sleep - if ( !OSload + if ( !min_time || !HWtimer || !min_time_gauging - || ((sleep_mode != CLOCK_STOP) && ((why_big_sleep == BIG_SLEEP_DUE_TO_UART) || (why_big_sleep == BIG_SLEEP_DUE_TO_SIM))) + || (sleep_mode != CLOCK_STOP) #if (OP_BT == 1) || !hci_ll_status #endif @@ -920,76 +856,38 @@ { - -#if (OP_L1_STANDALONE == 0) - /*GC_Wakeup(); OMAPS00134004*/ -#endif - #if (CODE_VERSION != SIMULATION) OS_system_Unprotect(); // free System structure // Enable all IRQ INT_EnableIRQ(); // Wake up UART -#if (GSM_IDLE_RAM != 0) - // Traffic controller has to be enabled before calling SER_WakeUpUarts - // as this function can access the external RAM. - // Reset the flag that will indicates if an interrup will put the traffic - // controller ON during that time. - l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int = FALSE; - if (!READ_TRAFFIC_CONT_STATE) - { - flag_traffic_controller_state = 1; - CSMI_TrafficControllerOn(); - } -#endif SER_WakeUpUarts(); // Wake up Uarts -#if (GSM_IDLE_RAM != 0) - // The traffic controller state shall be restored as it was before - // calling SER_WakeUpUarts. Do not disable it if an interrup occured - // in between and activated the traffic controller. - if ((flag_traffic_controller_state == 1) && (l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int == FALSE)) - { - CSMI_TrafficControllerOff(); - } - flag_traffic_controller_state = 0; #endif -#endif - #if 0 /* FreeCalypso TCS211 reconstruction */ - l1_trace_fail_sleep(FAIL_SLEEP_OSTIMERGAUGE, l1_pwmgr_debug.fail_id, l1_pwmgr_debug.fail_ret_val); - #endif return; } //================================================= // Select sleep duration .... //================================================= // remember: -1 means no activity planned - min_time = OSload; //l1a_l1s_com.time_to_next_l1s_task is UW32, min_time is W32. Max value of l1a_l1s_com.time_to_next_l1s_task will be 2p31 //and ,min_time max value will be 2p30. If min_time > l1a_l1s_com.time_to_next_l1s_task, //means MSB of l1a_l1s_com.time_to_next_l1s_task is zero. so, we can use- uw32_store_next_time & 0x7FFFFFFF - uw32_store_next_time = l1a_l1s_com.time_to_next_l1s_task; - if (min_time == -1) min_time = (WORD32)uw32_store_next_time; - //else MIN(min_time, (WORD32)l1a_l1s_com.time_to_next_l1s_task) - else - { - if(min_time > l1a_l1s_com.time_to_next_l1s_task) min_time = uw32_store_next_time & 0x7FFFFFFF; - //else min_time = min_time; - } + if (min_time == -1) min_time = l1a_l1s_com.time_to_next_l1s_task; + else MIN(min_time, l1a_l1s_com.time_to_next_l1s_task) if (HWtimer != -1) MIN(min_time, HWtimer) if (min_time_gauging != -1) MIN(min_time, min_time_gauging) #if (TRACE_TYPE !=0 ) && (TRACE_TYPE != 2) && (TRACE_TYPE != 3) // to trace the Wake up source // depending of min_time choose the wakeup_type - wakeup_type = WAKEUP_FOR_L1_TASK; + wakeup_type = WAKEUP_FOR_OS_TASK; if (min_time == l1a_l1s_com.time_to_next_l1s_task) wakeup_type = WAKEUP_FOR_L1_TASK; if (min_time == HWtimer) wakeup_type = WAKEUP_FOR_HW_TIMER_TASK; if (min_time == min_time_gauging) wakeup_type = WAKEUP_FOR_GAUGING_TASK; - if (min_time == OSload) wakeup_type = WAKEUP_FOR_OS_TASK; #endif //================================================= @@ -1015,7 +913,7 @@ { // BIG SLEEP is chosen : check the reason l1s.pw_mgr.sleep_performed = FRAME_STOP; - if ((l1s.pw_mgr.enough_gaug != TRUE) && (l1a_l1s_com.mode != CS_MODE0)) + if (l1s.pw_mgr.enough_gaug != TRUE) why_big_sleep = BIG_SLEEP_DUE_TO_GAUGING; else why_big_sleep = BIG_SLEEP_DUE_TO_DSP_TRACES; @@ -1032,36 +930,11 @@ if ((previous_sleep == CLOCK_STOP) && (time_from_last_wakeup < 7)) { #if (CODE_VERSION != SIMULATION) - OS_system_Unprotect(); // free System structure - INT_EnableIRQ(); // Enable all IRQ - #if (GSM_IDLE_RAM != 0) - // Traffic controller has to be enabled before calling SER_WakeUpUarts - // as this function can access the external RAM. - // Reset the flag that will indicates if an interrup will put the traffic - // controller ON during that time. - l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int = FALSE; - if (!READ_TRAFFIC_CONT_STATE) - { - flag_traffic_controller_state = 1; - CSMI_TrafficControllerOn(); - } - #endif + OS_system_Unprotect(); // free System structure + INT_EnableIRQ(); // Enable all IRQ - - SER_WakeUpUarts(); // Wake up Uarts - - + SER_WakeUpUarts(); // Wake up Uarts - #if (GSM_IDLE_RAM != 0) - // The traffic controller state shall be restored as it was before - // calling SER_WakeUpUarts. Do not disable it if an interrup occured - // in between and activated the traffic controller. - if ((flag_traffic_controller_state == 1) && (l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int == FALSE)) - { - CSMI_TrafficControllerOff(); - } - flag_traffic_controller_state = 0; - #endif #endif // NOT SIMULATION return; } @@ -1103,7 +976,7 @@ // (used when the MS lost the network: in this case the deep sleep may be used) if (l1a_l1s_com.mode == CS_MODE0) { - l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE*8,DEFAULT_32KHZ_VALUE); + l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE, DEFAULT_32KHZ_VALUE); } } @@ -1113,7 +986,7 @@ //============================================== #if ((CHIPSET ==4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)) // disable DPLL (do not provide clk to DSP & RIF (Bridge)) - ( * (volatile SYS_UWORD16 *) CLKM_CNTL_CLK) |= CLKM_DPLL_DIS ; /* CLKM_BRIDGE_DIS removed by Ranga*/ + ( * (volatile SYS_UWORD16 *) CLKM_CNTL_CLK) |= CLKM_DPLL_DIS | CLKM_BRIDGE_DIS; #endif //============================================== @@ -1159,11 +1032,6 @@ { // DEEP SLEEP -> need time to setup afc and rf wake_up_time = min_time - l1_config.params.setup_afc_and_rf; - #if (CODE_VERSION == NOT_SIMULATION) - // Sleep one more TDMA - this is done as part of merging init and TPU control - wake_up_time += 1; - #endif - } else // BIG SLEEP @@ -1220,24 +1088,7 @@ #if (W_A_CALYPSO_BUG_01435 == 1) f_arm_sleep_cmd(DEEP_SLEEP); #else - //EMIF_SetConfReg ( 0, 0, 2 ,1 ,0); - asm(" NOP"); - asm(" NOP"); - asm(" NOP"); - asm(" NOP"); *((volatile UWORD16 *)CLKM_ARM_CLK) &= ~(CLKM_DEEP_SLEEP); // set deep sleep mode - asm(" NOP"); - asm(" NOP"); - asm(" NOP"); - asm(" NOP"); -// set deep sleep mode in case it is not set back by hardware - *((volatile UWORD16 *)CLKM_ARM_CLK) |= (CLKM_DEEP_SLEEP); - - //EMIF_SetConfReg ( 0, 0, 2 ,0 ,0); - // *((volatile UWORD16 *)CLKM_ARM_CLK) &= 0xFFFF; // set deep sleep mode - // *((volatile UWORD16 *)CLKM_ARM_CLK) &= ~(CLKM_MCLK_EN); // For Debug only - - #endif #endif // OP_WCP } @@ -1380,7 +1231,6 @@ #endif #endif } - int_id = 0; #endif #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4)