comparison fpga/tools/yosys-tee @ 52:cbfcc480d61b

fpga build: migrate to yosys-tee wrapper
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 03 Oct 2023 18:17:58 +0000
parents fpga/tools/yosys-wrap@af1a9732da1f
children
comparison
equal deleted inserted replaced
51:8a3003860cf8 52:cbfcc480d61b
1 #!/bin/sh
2
3 if [ $# -lt 4 ]
4 then
5 echo "usage: $0 top-module json-output report-out verilog-src..." 1>&2
6 exit 1
7 fi
8
9 top="$1"
10 json="$2"
11 report="$3"
12
13 shift
14 shift
15 shift
16
17 rm -f "$json"
18 yosys -p "synth_ice40 -top $top -json $json" "$@" | tee "$report"
19
20 if [ -f "$json" ]
21 then
22 echo "$json created, declaring success"
23 exit 0
24 else
25 echo "$json NOT created, declaring error"
26 exit 1
27 fi