FreeCalypso > hg > fc-sim-sniff
diff fpga/sniffer-pps/top.v @ 31:ab37fcb71744
fpga/sniffer-pps: add actual F/D control
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Tue, 29 Aug 2023 21:22:37 +0000 |
| parents | dc99c9962aed |
| children | 737579209153 |
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--- a/fpga/sniffer-pps/top.v Tue Aug 29 20:36:34 2023 +0000 +++ b/fpga/sniffer-pps/top.v Tue Aug 29 21:22:37 2023 +0000 @@ -24,8 +24,12 @@ wire [7:0] Rx_char; wire Rx_start_bit, Rx_parity_bit; +wire speed_enh_mode; +wire [1:0] speed_enh_mult; + sniff_rx sniff_rx (CLK12, SIM_RST_sync, SIM_CLK_sync, SIM_IO_sync, - Rx_strobe, Rx_error, Rx_char, Rx_start_bit, Rx_parity_bit); + Rx_strobe, Rx_error, Rx_char, Rx_start_bit, Rx_parity_bit, + speed_enh_mode, speed_enh_mult); /* PPS catcher */ @@ -34,6 +38,10 @@ pps_catcher pps (CLK12, SIM_RST_sync, Rx_strobe, Rx_char, pos_PPS_resp_PPS1, pos_PPS_resp_PCK); +spenh_ctrl spenh (CLK12, SIM_RST_sync, Rx_strobe, Rx_char, + pos_PPS_resp_PPS1, pos_PPS_resp_PCK, + speed_enh_mode, speed_enh_mult); + /* explicit detection of RST transitions */ wire SIM_RST_toggle; @@ -46,7 +54,7 @@ wire [15:0] Tx_data; assign Tx_trigger = Rx_strobe | SIM_RST_toggle; -assign Tx_data = {SIM_RST_toggle,SIM_RST_sync,1'b0, +assign Tx_data = {SIM_RST_toggle,SIM_RST_sync,speed_enh_mode, pos_PPS_resp_PCK,pos_PPS_resp_PPS1, Rx_error,Rx_start_bit,Rx_parity_bit,Rx_char};