FreeCalypso > hg > fc-sim-sniff
changeset 13:82da4b7835b7
FPGA Makefile: generate timing.rpt
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Mon, 21 Aug 2023 01:12:16 +0000 |
| parents | d29dcfa78124 |
| children | 54c3a277d64a |
| files | fpga/sniffer-basic/Makefile |
| diffstat | 1 files changed, 4 insertions(+), 1 deletions(-) [+] |
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--- a/fpga/sniffer-basic/Makefile Mon Aug 21 01:10:23 2023 +0000 +++ b/fpga/sniffer-basic/Makefile Mon Aug 21 01:12:16 2023 +0000 @@ -2,7 +2,7 @@ PCF= icestick.pcf PROJ= fpga -all: ${PROJ}.bin +all: ${PROJ}.bin timing.rpt ${PROJ}.json: ${VSRC} yosys-wrap top $@ ${VSRC} | tee synthesis.rpt @@ -14,5 +14,8 @@ ${PROJ}.bin: ${PROJ}.asc icepack $< $@ +timing.rpt: ${PROJ}.asc + icetime -d hx1k -mtr $@ $< + clean: rm -f *.json *.asc *.bin