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annotate duart28c/src/primitives @ 83:9efa98ea62e5

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sim-fpc-pasv: PCB layout done
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 25 Oct 2022 07:31:52 +0000
parents d4da3aed4c1e
children
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d80978bd645e duart28c: started with a copy from duart28
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1 /*
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2 * This file defines the primitives to be instantiated from the structural
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3 * Verilog source for the board: IC package types, basic components and
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4 * subpackages to be mapped later in the MCL binding step.
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5 */
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6
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7 resistor numpins 2;
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8 capacitor numpins 2;
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9 inductor numpins 2;
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10
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11 /* IC packages */
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12 pkg_LQFP48 numpins 48;
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13 pkg_5pin numpins 5;
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14 pkg_8pin numpins 8;
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16 /* 74LVC541A single buffer and common part subpackages */
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17 buffer_ic_slot mapped_pins (A, Y);
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18 buffer_ic_common mapped_pins (Vcc, GND, nOE1, nOE2);
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19
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20 /* 74LVC2G07 single buffer and common part subpackages */
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21 od_buffer_ic_slot mapped_pins (A, Y);
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22 od_buffer_ic_common mapped_pins (Vcc, GND);
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24 /* crystal resonator */
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25 xtal_2pin_pkg numpins 2;
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26
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27 /* connectors */
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28 header_2pin numpins 2;
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29 header_3pin numpins 3;
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30 header_10pin numpins 10;
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31 conn_miniUSB_plus4 numpins 9;