freecalypso-reveng: compal/c139-boot.disasm annotate

annotate compal/c139-boot.disasm @ 105:49c7cda96f04

C139 boot ROM fully cracked

author	Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date	Mon, 31 Mar 2014 05:51:57 +0000
parents	52cec4b71cfe
children

rev	line source
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1 RESET entry and exception vectors:
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2 0: ea000225 b 0x89c
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	3 4: ea000825 b 0x20a0
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	4 8: ea000825 b 0x20a4
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	5 c: ea000825 b 0x20a8
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	6 10: ea000825 b 0x20ac
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	7 14: ea000825 b 0x20b0
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	8 18: ea000825 b 0x20b4
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	9 1c: ea000825 b 0x20b8
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	10
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	11 ; some magic words?
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	12 20: 444efc57
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	13 24: 444efc58
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	14 28: 444efc86
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	15 2c: 444efc87
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	16 ; different in the C140 specimen:
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	17 20: 44b1b707
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	18 24: 44b1b708
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	19 28: 44b1b735
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	20 2c: 44b1b736
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	21
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	22 <30-7FF: all FFs>
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	23
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	24 00000800: 42 4F 4F 54 2E 39 30 2E 30 34 00 00 00 00 00 00 BOOT.90.04......
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	25 00000810: 31 30 30 33 01 01 00 00 FF FF FF FF FF FF FF FF 1003............
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	26 00000820: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	27
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	28 830: 00000006
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	29 ...
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	30 83c: 00000048
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	31 840: 00000044
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	32 844: 00000052
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	33 848: 0000001b
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	34 84c: 00000005
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	35 ...
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	36 860: 000000fa
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	37 864: ffff5800
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	38 868: ffff5000
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	39 86c: fffffb00
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	40 870: 02a1
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	41 872: 02a1
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	42 874: 02a1
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	43 876: 0283
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	44 878: 0281
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	45 87a: 00c0
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	46 87c: 0040
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	47 87e: 002a
85 3c420895f68f compal boot ROM re: minor progress Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 84 diff changeset	48 880: 00000040
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	49 884: fffffd00
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	50 888: ffff9800
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	51 88c: fffffb10
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	52 890: ffffff08
85 3c420895f68f compal boot ROM re: minor progress Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 84 diff changeset	53 894: 1081
3c420895f68f compal boot ROM re: minor progress Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 84 diff changeset	54 896: 2006
3c420895f68f compal boot ROM re: minor progress Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 84 diff changeset	55 898: 0800
3c420895f68f compal boot ROM re: minor progress Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 84 diff changeset	56 89a: 0000
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	57
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	58 ; RESET entry point
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	59 ; set VCLKOUT_DIV2 in FFFF:FD02 register
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	60 89c: e51f1020 ldr r1, =0xfffffd00 ; via 0x884
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	61 8a0: e1d120b2 ldrh r2, [r1, #2]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	62 8a4: e51f002c ldr r0, =0x40 ; via 0x880
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	63 8a8: e1800002 orr r0, r0, r2
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	64 8ac: e1c100b2 strh r0, [r1, #2]
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	65 ; PLL disable (power-up state)
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	66 8b0: e51f1030 ldr r1, =0xffff9800 ; via 0x888
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	67 8b4: e15f22b6 ldrh r2, =0x2006 ; via 0x896
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	68 8b8: e1c120b0 strh r2, [r1]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	69 8bc: e5912000 ldr r2, [r1]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	70 8c0: e2022001 and r2, r2, #1
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	71 8c4: e3520001 cmp r2, #1
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	72 8c8: 0afffffb beq 0x8bc
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	73 ; Write power-up default value into FFFF:FD00
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	74 8cc: e51f1050 ldr r1, =0xfffffd00 ; via 0x884
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	75 8d0: e15f24b4 ldrh r2, =0x1081 ; via 0x894
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	76 8d4: e1c120b0 strh r2, [r1]
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	77 ; Disable DU
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	78 8d8: e51f1054 ldr r1, =0xfffffb10 ; via 0x88c
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	79 8dc: e15f24bc ldrh r2, =0x800 ; via 0x898
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	80 8e0: e1d100b0 ldrh r0, [r1]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	81 8e4: e1800002 orr r0, r0, r2
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	82 8e8: e1c100b0 strh r0, [r1]
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	83 ; Disable all MPU regions
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	84 8ec: e51f1064 ldr r1, =0xffffff08 ; via 0x890
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	85 8f0: e15f25be ldrh r2, =0x0 ; via 0x89a
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	86 8f4: e1c120b0 strh r2, [r1]
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	87 ; Memory timings
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	88 8f8: e51f1094 ldr r1, =0xfffffb00 ; via 0x86c
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	89 8fc: e15f29b4 ldrh r2, =0x2a1 ; via 0x870
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	90 900: e1c120b0 strh r2, [r1]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	91 904: e15f29ba ldrh r2, =0x2a1 ; via 0x872
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	92 908: e1c120b2 strh r2, [r1, #2]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	93 90c: e15f2ab0 ldrh r2, =0x2a1 ; via 0x874
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	94 910: e1c120b4 strh r2, [r1, #4]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	95 914: e15f2ab6 ldrh r2, =0x283 ; via 0x876
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	96 918: e1c120b6 strh r2, [r1, #6]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	97 91c: e15f2abc ldrh r2, =0x281 ; via 0x878
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	98 920: e1c120ba strh r2, [r1, #10] ; 0xa
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	99 924: e15f2bb2 ldrh r2, =0xc0 ; via 0x87a
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	100 928: e1c120bc strh r2, [r1, #12] ; 0xc
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	101 92c: e15f2bb8 ldrh r2, =0x40 ; via 0x87c
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	102 930: e1c120b8 strh r2, [r1, #8]
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	103 934: e15f2bbe ldrh r2, =0x2a ; via 0x87e
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	104 938: e1c120be strh r2, [r1, #14] ; 0xe
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	105 ; set up stack
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	106 93c: e59f0020 ldr r0, =0x83e574 ; via 0x964
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	107 940: e3a01b01 mov r1, #1024 ; 0x400
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	108 944: e2411004 sub r1, r1, #4
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	109 948: e0802001 add r2, r0, r1
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	110 94c: e3c22003 bic r2, r2, #3
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	111 950: e1a0d002 mov sp, r2
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	112 ; business logic
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	113 954: e92d100f stmdb sp!, {r0, r1, r2, r3, r12}
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	114 958: eb000534 bl 0x1e30
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	115 95c: e8bd100f ldmia sp!, {r0, r1, r2, r3, r12}
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	116 960: ea0005e4 b 0x20f8
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	117
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	118 ; C139 specimen:
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	119 964: 0083e574
99 3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	120 ; different in the C140 specimen:
3bd695d9b2b4 C139 boot re: C140 differences noted Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 85 diff changeset	121 964: 0083e55c
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	122
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	123 ; mask all interrupts in INTH
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	124 968: 4961 ldr r1, =0xfffffa08 ; via 0xaf0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	125 96a: 4862 ldr r0, =0xffff ; via 0xaf4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	126 96c: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	127 96e: 4862 ldr r0, =0xfffffa0a ; via 0xaf8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	128 970: 211f mov r1, #31 ; 0x1f
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	129 972: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	130 ; disable watchdog
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	131 974: 4861 ldr r0, =0xfffff804 ; via 0xafc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	132 976: 21f5 mov r1, #245 ; 0xf5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	133 978: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	134 97a: 21a0 mov r1, #160 ; 0xa0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	135 97c: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	136 ; disable PLL
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	137 97e: 4860 ldr r0, =0xffff9800 ; via 0xb00
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	138 980: 4960 ldr r1, =0x2002 ; via 0xb04
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	139 982: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	140 984: 485e ldr r0, =0xffff9800 ; via 0xb00
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	141 986: 8800 ldrh r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	142 988: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	143 98a: d2fb bcs 0x984
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	144 ; 0x1001 written into FFFF:FD00 - same as power-up default
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	145 ; except for one reserved bit
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	146 98c: 495e ldr r1, =0xfffffd00 ; via 0xb08
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	147 98e: 485f ldr r0, =0x1001 ; via 0xb0c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	148 990: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	149 992: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	150
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	151 994: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	152 996: b0ff sub sp, #508 ; 0x1fc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	153 998: b0ca sub sp, #296 ; 0x128
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	154 99a: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	155 99c: 9001 str r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	156 99e: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	157 9a0: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	158 9a2: d14e bne 0xa42
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	159 9a4: a846 add r0, sp, #280 ; 0x118
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	160 9a6: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	161 9a8: f001 f86e bl 0x1a88
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	162 9ac: a9c8 add r1, sp, #800 ; 0x320
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	163 9ae: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	164 9b0: a846 add r0, sp, #280 ; 0x118
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	165 9b2: a902 add r1, sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	166 9b4: f000 fb2c bl 0x1010
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	167 9b8: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	168 9ba: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	169 9bc: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	170 9be: d01b beq 0x9f8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	171 9c0: a924 add r1, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	172 9c2: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	173 9c4: 7a00 ldrb r0, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	174 9c6: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	175 9c8: 2191 mov r1, #145 ; 0x91
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	176 9ca: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	177 9cc: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	178 9ce: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	179 9d0: 5488 strb r0, [r1, r2]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	180 9d2: e01b b 0xa0c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	181 9d4: a802 add r0, sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	182 9d6: a924 add r1, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	183 9d8: f000 fe08 bl 0x15ec
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	184 9dc: e016 b 0xa0c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	185 9de: a802 add r0, sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	186 9e0: a924 add r1, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	187 9e2: aac8 add r2, sp, #800 ; 0x320
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	188 9e4: 7812 ldrb r2, [r2, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	189 9e6: f000 fe15 bl 0x1614
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	190 9ea: e00f b 0xa0c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	191 9ec: a802 add r0, sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	192 9ee: a924 add r1, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	193 9f0: f000 fe47 bl 0x1682
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	194 9f4: 90c7 str r0, [sp, #796] ; 0x31c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	195 9f6: e009 b 0xa0c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	196 9f8: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	197 9fa: 7a00 ldrb r0, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	198 9fc: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	199 9fe: d0e9 beq 0x9d4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	200 a00: 3809 sub r0, #9
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	201 a02: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	202 a04: d0eb beq 0x9de
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	203 a06: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	204 a08: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	205 a0a: d0ef beq 0x9ec
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	206 a0c: a824 add r0, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	207 a0e: a986 add r1, sp, #536 ; 0x218
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	208 a10: f000 fbe1 bl 0x11d6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	209 a14: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	210 a16: d111 bne 0xa3c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	211 a18: a886 add r0, sp, #536 ; 0x218
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	212 a1a: a9c8 add r1, sp, #800 ; 0x320
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	213 a1c: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	214 a1e: f001 f808 bl 0x1a32
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	215 a22: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	216 a24: d00a beq 0xa3c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	217 a26: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	218 a28: 7a00 ldrb r0, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	219 a2a: 280a cmp r0, #10 ; 0xa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	220 a2c: d106 bne 0xa3c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	221 a2e: a8c8 add r0, sp, #800 ; 0x320
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	222 a30: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	223 a32: f001 f959 bl 0x1ce8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	224 a36: 98c7 ldr r0, [sp, #796] ; 0x31c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	225 a38: f000 fae8 bl 0x100c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	226 a3c: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	227 a3e: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	228 a40: d0b0 beq 0x9a4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	229 a42: b07f add sp, #508 ; 0x1fc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	230 a44: b04a add sp, #296 ; 0x128
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	231 a46: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	232
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	233 a48: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	234 a4a: b0ff sub sp, #508 ; 0x1fc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	235 a4c: b0c8 sub sp, #288 ; 0x120
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	236 a4e: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	237 a50: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	238 a52: a846 add r0, sp, #280 ; 0x118
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	239 a54: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	240 a56: f001 f817 bl 0x1a88
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	241 a5a: a9c6 add r1, sp, #792 ; 0x318
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	242 a5c: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	243 a5e: a8c6 add r0, sp, #792 ; 0x318
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	244 a60: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	245 a62: 28ff cmp r0, #255 ; 0xff
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	246 a64: d031 beq 0xaca
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	247 a66: a846 add r0, sp, #280 ; 0x118
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	248 a68: a902 add r1, sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	249 a6a: f000 fad1 bl 0x1010
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	250 a6e: 9001 str r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	251 a70: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	252 a72: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	253 a74: d014 beq 0xaa0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	254 a76: a924 add r1, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	255 a78: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	256 a7a: 7a00 ldrb r0, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	257 a7c: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	258 a7e: 2291 mov r2, #145 ; 0x91
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	259 a80: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	260 a82: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	261 a84: 7909 ldrb r1, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	262 a86: 5411 strb r1, [r2, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	263 a88: a824 add r0, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	264 a8a: a986 add r1, sp, #536 ; 0x218
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	265 a8c: f000 fba3 bl 0x11d6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	266 a90: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	267 a92: d11a bne 0xaca
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	268 a94: a886 add r0, sp, #536 ; 0x218
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	269 a96: a9c6 add r1, sp, #792 ; 0x318
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	270 a98: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	271 a9a: f000 ffca bl 0x1a32
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	272 a9e: e014 b 0xaca
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	273 aa0: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	274 aa2: 7a00 ldrb r0, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	275 aa4: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	276 aa6: d110 bne 0xaca
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	277 aa8: a802 add r0, sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	278 aaa: a924 add r1, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	279 aac: f000 fd9e bl 0x15ec
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	280 ab0: a824 add r0, sp, #144 ; 0x90
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	281 ab2: a986 add r1, sp, #536 ; 0x218
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	282 ab4: f000 fb8f bl 0x11d6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	283 ab8: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	284 aba: d104 bne 0xac6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	285 abc: a886 add r0, sp, #536 ; 0x218
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	286 abe: a9c6 add r1, sp, #792 ; 0x318
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	287 ac0: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	288 ac2: f000 ffb6 bl 0x1a32
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	289 ac6: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	290 ac8: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	291 aca: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	292 acc: b07f add sp, #508 ; 0x1fc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	293 ace: b048 add sp, #288 ; 0x120
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	294 ad0: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	295
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	296 ; Main entry routine
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	297 ad2: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	298 ad4: b082 sub sp, #8
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	299 ad6: f7ff ff47 bl 0x968 ; superfluous
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	300 ada: f001 f8ad bl 0x1c38 ; UART init
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	301 ade: f000 fd73 bl 0x15c8 ; zero a couple of vars
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	302 ae2: f000 f81f bl 0xb24 ; serial protocol
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	303 ae6: f000 f96a bl 0xdbe ; ftmtool voodoo
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	304 aea: b002 add sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	305 aec: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	306 aee: 46c0 nop (mov r8, r8)
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	307
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	308 af0: fffffa08
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	309 af4: 0000ffff
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	310 af8: fffffa0a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	311 afc: fffff804
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	312 b00: ffff9800
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	313 b04: 00002002
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	314 b08: fffffd00
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	315 b0c: 00001001
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	316
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	317 b10: e3a0d502 mov sp, #8388608 ; 0x800000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	318 b14: e28dd802 add sp, sp, #131072 ; 0x20000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	319 b18: e28fe005 add lr, pc, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	320 b1c: e12fff1e bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	321 b20: e1a00000 mov r0, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	322
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	323 ; This function (0xb24, called from this bootloader's "main") calls
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	324 ; 0xbac (serial download attempt) twice, first at 406250 baud, then
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	325 ; at 115200 baud. Only the MODEM UART is tried, not IrDA.
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	326 b24: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	327 b26: b082 sub sp, #8
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	328 ; select MODEM UART
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	329 b28: 49ed ldr r1, =0x83ff00 ; via 0xee0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	330 b2a: 48ee ldr r0, =0xffff5800 ; via 0xee4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	331 b2c: 6008 str r0, [r1, #0]
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	332 ; set it to /2 (406250 baud)
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	333 b2e: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	334 b30: 2102 mov r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	335 b32: f000 f9fb bl 0xf2c
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	336 ; delay loop
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	337 b36: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	338 b38: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	339 b3a: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	340 b3c: 2005 mov r0, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	341 b3e: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	342 b40: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	343 b42: d207 bcs 0xb54
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	344 b44: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	345 b46: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	346 b48: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	347 b4a: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	348 b4c: 2005 mov r0, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	349 b4e: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	350 b50: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	351 b52: d3f7 bcc 0xb44
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	352 ; 0xbac called at 406250 baud
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	353 b54: f000 f82a bl 0xbac
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	354 ; set it to /7 (115200 baud)
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	355 b58: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	356 b5a: 2107 mov r1, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	357 b5c: f000 f9e6 bl 0xf2c
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	358 ; same delay loop again
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	359 b60: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	360 b62: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	361 b64: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	362 b66: 2005 mov r0, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	363 b68: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	364 b6a: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	365 b6c: d207 bcs 0xb7e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	366 b6e: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	367 b70: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	368 b72: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	369 b74: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	370 b76: 2005 mov r0, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	371 b78: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	372 b7a: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	373 b7c: d3f7 bcc 0xb6e
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	374 ; call 0xbac again, this time at 115200 baud
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	375 b7e: f000 f815 bl 0xbac
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	376 ; another (longer) delay loop, then return
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	377 b82: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	378 b84: 9001 str r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	379 b86: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	380 b88: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	381 b8a: 2005 mov r0, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	382 b8c: 0400 lsl r0, r0, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	383 b8e: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	384 b90: d20a bcs 0xba8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	385 b92: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	386 b94: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	387 b96: 9001 str r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	388 b98: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	389 b9a: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	390 b9c: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	391 b9e: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	392 ba0: 2005 mov r0, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	393 ba2: 0400 lsl r0, r0, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	394 ba4: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	395 ba6: d3f4 bcc 0xb92
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	396 ba8: b002 add sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	397 baa: bd00 pop {pc}
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	398
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	399 ; This function implements the entirety of the serial download protocol,
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	400 ; see c139-boot.notes for the details.
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	401 bac: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	402 bae: b088 sub sp, #32 ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	403 bb0: 48dd ldr r0, =0x800100 ; via 0xf28
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	404 bb2: 9005 str r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	405 bb4: 201b mov r0, #27 ; 0x1b
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	406 bb6: f000 f95f bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	407 bba: 20f6 mov r0, #246 ; 0xf6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	408 bbc: f000 f95c bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	409 bc0: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	410 bc2: f000 f959 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	411 bc6: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	412 bc8: f000 f956 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	413 bcc: 2041 mov r0, #65 ; 0x41
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	414 bce: f000 f953 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	415 bd2: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	416 bd4: f000 f950 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	417 bd8: 2040 mov r0, #64 ; 0x40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	418 bda: f000 f94d bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	419 bde: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	420 be0: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	421 be2: f000 f961 bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	422 be6: 281b cmp r0, #27 ; 0x1b
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	423 be8: d000 beq 0xbec
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	424 bea: e0e6 b 0xdba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	425 bec: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	426 bee: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	427 bf0: f000 f95a bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	428 bf4: 28f6 cmp r0, #246 ; 0xf6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	429 bf6: d000 beq 0xbfa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	430 bf8: e0df b 0xdba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	431 bfa: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	432 bfc: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	433 bfe: f000 f953 bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	434 c02: 2802 cmp r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	435 c04: d000 beq 0xc08
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	436 c06: e0d8 b 0xdba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	437 c08: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	438 c0a: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	439 c0c: f000 f94c bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	440 c10: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	441 c12: d000 beq 0xc16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	442 c14: e0d1 b 0xdba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	443 c16: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	444 c18: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	445 c1a: f000 f945 bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	446 c1e: 2852 cmp r0, #82 ; 0x52
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	447 c20: d000 beq 0xc24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	448 c22: e0ca b 0xdba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	449 c24: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	450 c26: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	451 c28: f000 f93e bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	452 c2c: 2801 cmp r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	453 c2e: d000 beq 0xc32
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	454 c30: e0c3 b 0xdba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	455 c32: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	456 c34: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	457 c36: f000 f937 bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	458 c3a: 2853 cmp r0, #83 ; 0x53
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	459 c3c: d000 beq 0xc40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	460 c3e: e0bc b 0xdba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	461 c40: 201b mov r0, #27 ; 0x1b
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	462 c42: f000 f919 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	463 c46: 20f6 mov r0, #246 ; 0xf6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	464 c48: f000 f916 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	465 c4c: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	466 c4e: f000 f913 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	467 c52: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	468 c54: f000 f910 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	469 c58: 2041 mov r0, #65 ; 0x41
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	470 c5a: f000 f90d bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	471 c5e: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	472 c60: f000 f90a bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	473 c64: 2043 mov r0, #67 ; 0x43
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	474 c66: f000 f907 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	475 c6a: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	476 c6c: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	477 c6e: f000 f91b bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	478 c72: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	479 c74: 7208 strb r0, [r1, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	480 c76: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	481 c78: 7448 strb r0, [r1, #17] ; 0x11
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	482 c7a: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	483 c7c: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	484 c7e: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	485 c80: 2802 cmp r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	486 c82: d215 bcs 0xcb0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	487 c84: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	488 c86: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	489 c88: f000 f90e bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	490 c8c: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	491 c8e: 9a00 ldr r2, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	492 c90: 1a89 sub r1, r1, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	493 c92: 7348 strb r0, [r1, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	494 c94: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	495 c96: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	496 c98: 1a08 sub r0, r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	497 c9a: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	498 c9c: 7c49 ldrb r1, [r1, #17] ; 0x11
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	499 c9e: 4048 eor r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	500 ca0: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	501 ca2: 7448 strb r0, [r1, #17] ; 0x11
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	502 ca4: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	503 ca6: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	504 ca8: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	505 caa: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	506 cac: 2802 cmp r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	507 cae: d3e9 bcc 0xc84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	508 cb0: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	509 cb2: 8980 ldrh r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	510 cb4: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	511 cb6: 1e41 sub r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	512 cb8: 8191 strh r1, [r2, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	513 cba: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	514 cbc: d016 beq 0xcec
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	515 cbe: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	516 cc0: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	517 cc2: f000 f8f1 bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	518 cc6: 9905 ldr r1, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	519 cc8: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	520 cca: 9805 ldr r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	521 ccc: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	522 cce: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	523 cd0: 7c49 ldrb r1, [r1, #17] ; 0x11
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	524 cd2: 4048 eor r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	525 cd4: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	526 cd6: 7448 strb r0, [r1, #17] ; 0x11
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	527 cd8: 9805 ldr r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	528 cda: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	529 cdc: 9005 str r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	530 cde: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	531 ce0: 8981 ldrh r1, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	532 ce2: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	533 ce4: 1e48 sub r0, r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	534 ce6: 8190 strh r0, [r2, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	535 ce8: 2900 cmp r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	536 cea: d1e8 bne 0xcbe
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	537 cec: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	538 cee: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	539 cf0: f000 f8da bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	540 cf4: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	541 cf6: 7408 strb r0, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	542 cf8: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	543 cfa: 7c00 ldrb r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	544 cfc: 7c49 ldrb r1, [r1, #17] ; 0x11
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	545 cfe: 4288 cmp r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	546 d00: d015 beq 0xd2e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	547 d02: 201b mov r0, #27 ; 0x1b
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	548 d04: f000 f8b8 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	549 d08: 20f6 mov r0, #246 ; 0xf6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	550 d0a: f000 f8b5 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	551 d0e: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	552 d10: f000 f8b2 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	553 d14: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	554 d16: f000 f8af bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	555 d1a: 2045 mov r0, #69 ; 0x45
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	556 d1c: f000 f8ac bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	557 d20: 2053 mov r0, #83 ; 0x53
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	558 d22: f000 f8a9 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	559 d26: 2016 mov r0, #22 ; 0x16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	560 d28: f000 f8a6 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	561 d2c: e045 b 0xdba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	562 d2e: 2081 mov r0, #129 ; 0x81
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	563 d30: 0100 lsl r0, r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	564 d32: 9006 str r0, [sp, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	565 d34: 48af ldr r0, =0x803ce0 ; via 0xff4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	566 d36: 9007 str r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	567 d38: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	568 d3a: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	569 d3c: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	570 d3e: 2804 cmp r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	571 d40: d221 bcs 0xd86
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	572 d42: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	573 d44: 9806 ldr r0, [sp, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	574 d46: 5c0a ldrb r2, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	575 d48: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	576 d4a: 9807 ldr r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	577 d4c: 5c08 ldrb r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	578 d4e: 4282 cmp r2, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	579 d50: dd13 ble 0xd7a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	580 d52: 201b mov r0, #27 ; 0x1b
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	581 d54: f000 f890 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	582 d58: 20f6 mov r0, #246 ; 0xf6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	583 d5a: f000 f88d bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	584 d5e: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	585 d60: f000 f88a bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	586 d64: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	587 d66: f000 f887 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	588 d6a: 2041 mov r0, #65 ; 0x41
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	589 d6c: f000 f884 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	590 d70: 2003 mov r0, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	591 d72: f000 f881 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	592 d76: 2057 mov r0, #87 ; 0x57
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	593 d78: e7d6 b 0xd28
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	594 d7a: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	595 d7c: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	596 d7e: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	597 d80: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	598 d82: 2804 cmp r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	599 d84: d3dd bcc 0xd42
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	600 d86: 201b mov r0, #27 ; 0x1b
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	601 d88: f000 f876 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	602 d8c: 20f6 mov r0, #246 ; 0xf6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	603 d8e: f000 f873 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	604 d92: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	605 d94: f000 f870 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	606 d98: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	607 d9a: f000 f86d bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	608 d9e: 2041 mov r0, #65 ; 0x41
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	609 da0: f000 f86a bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	610 da4: 2003 mov r0, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	611 da6: f000 f867 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	612 daa: 2042 mov r0, #66 ; 0x42
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	613 dac: f000 f864 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	614 db0: 484b ldr r0, =0x83ff00 ; via 0xee0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	615 db2: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	616 db4: 4990 ldr r1, =0x800100 ; via 0xff8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	617 db6: f000 f85e bl 0xe76
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	618 dba: b008 add sp, #32 ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	619 dbc: bd00 pop {pc}
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	620
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	621 dbe: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	622 dc0: b081 sub sp, #4
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	623 ; transmit "ftmtool" 7 bytes
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	624 dc2: 2066 mov r0, #102 ; 0x66
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	625 dc4: f000 f858 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	626 dc8: 2074 mov r0, #116 ; 0x74
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	627 dca: f000 f855 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	628 dce: 206d mov r0, #109 ; 0x6d
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	629 dd0: f000 f852 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	630 dd4: 2074 mov r0, #116 ; 0x74
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	631 dd6: f000 f84f bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	632 dda: 206f mov r0, #111 ; 0x6f
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	633 ddc: f000 f84c bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	634 de0: 206f mov r0, #111 ; 0x6f
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	635 de2: f000 f849 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	636 de6: 206c mov r0, #108 ; 0x6c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	637 de8: f000 f846 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	638 dec: 4983 ldr r1, =0x83ff80 ; via 0xffc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	639 dee: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	640 df0: 7008 strb r0, [r1, #0]
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	641 ; delay loop
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	642 df2: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	643 df4: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	644 df6: 0c00 lsr r0, r0, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	645 df8: d105 bne 0xe06
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	646 dfa: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	647 dfc: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	648 dfe: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	649 e00: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	650 e02: 0c00 lsr r0, r0, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	651 e04: d0f9 beq 0xdfa
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	652 ; call Rx-char: expecting "yes"
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	653 e06: 2007 mov r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	654 e08: 0400 lsl r0, r0, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	655 e0a: f000 f84d bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	656 e0e: 2879 cmp r0, #121 ; 0x79
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	657 e10: d10e bne 0xe30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	658 e12: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	659 e14: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	660 e16: f000 f847 bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	661 e1a: 2865 cmp r0, #101 ; 0x65
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	662 e1c: d108 bne 0xe30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	663 e1e: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	664 e20: 0300 lsl r0, r0, #12
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	665 e22: f000 f841 bl 0xea8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	666 e26: 2873 cmp r0, #115 ; 0x73
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	667 e28: d102 bne 0xe30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	668 e2a: 4874 ldr r0, =0x83ff80 ; via 0xffc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	669 e2c: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	670 e2e: 7001 strb r1, [r0, #0]
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	671 ; "yes" and normal boot code paths merge
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	672 e30: f000 f8ce bl 0xfd0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	673 e34: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	674 e36: d00d beq 0xe54
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	675 e38: 206d mov r0, #109 ; 0x6d
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	676 e3a: f000 f81d bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	677 e3e: 206f mov r0, #111 ; 0x6f
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	678 e40: f000 f81a bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	679 e44: 2064 mov r0, #100 ; 0x64
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	680 e46: f000 f817 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	681 e4a: 2065 mov r0, #101 ; 0x65
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	682 e4c: f000 f814 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	683 e50: 206d mov r0, #109 ; 0x6d
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	684 e52: e00c b 0xe6e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	685 e54: 2065 mov r0, #101 ; 0x65
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	686 e56: f000 f80f bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	687 e5a: 2072 mov r0, #114 ; 0x72
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	688 e5c: f000 f80c bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	689 e60: 2072 mov r0, #114 ; 0x72
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	690 e62: f000 f809 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	691 e66: 206f mov r0, #111 ; 0x6f
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	692 e68: f000 f806 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	693 e6c: 2072 mov r0, #114 ; 0x72
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	694 e6e: f000 f803 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	695 e72: b001 add sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	696 e74: bd00 pop {pc}
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	697
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	698 ; Called via Thumb-BL to transfer control to the downloaded image
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	699 e76: 4708 bx r1
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	700
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	701 ; UART character output routine
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	702 e78: b081 sub sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	703 e7a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	704 e7c: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	705 e7e: 4818 ldr r0, =0x83ff00 ; via 0xee0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	706 e80: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	707 e82: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	708 e84: 0980 lsr r0, r0, #6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	709 e86: d3fa bcc 0xe7e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	710 e88: 4815 ldr r0, =0x83ff00 ; via 0xee0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	711 e8a: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	712 e8c: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	713 e8e: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	714 e90: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	715 e92: b001 add sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	716 e94: 46f7 mov pc, lr
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	717
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	718 e96: 4812 ldr r0, =0x83ff00 ; via 0xee0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	719 e98: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	720 e9a: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	721 e9c: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	722 e9e: d3fa bcc 0xe96
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	723 ea0: 480f ldr r0, =0x83ff00 ; via 0xee0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	724 ea2: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	725 ea4: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	726 ea6: 4770 bx lr
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	727
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	728 ; UART character input with a timeout (number of LSR read tries passed
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	729 ; in r0). Returns the character read if one was received, or 0xFF
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	730 ; if timeout.
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	731 ea8: b083 sub sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	732 eaa: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	733 eac: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	734 eae: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	735 eb0: 480b ldr r0, =0x83ff00 ; via 0xee0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	736 eb2: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	737 eb4: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	738 eb6: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	739 eb8: d20c bcs 0xed4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	740 eba: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	741 ebc: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	742 ebe: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	743 ec0: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	744 ec2: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	745 ec4: d101 bne 0xeca
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	746 ec6: 20ff mov r0, #255 ; 0xff
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	747 ec8: e007 b 0xeda
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	748 eca: 4805 ldr r0, =0x83ff00 ; via 0xee0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	749 ecc: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	750 ece: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	751 ed0: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	752 ed2: d3f2 bcc 0xeba
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	753 ed4: 484a ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	754 ed6: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	755 ed8: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	756 eda: b003 add sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	757 edc: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	758 ede: 46c0 nop (mov r8, r8)
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	759
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	760 ee0: 0083ff00
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	761 ee4: ffff5800
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	762
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	763 ee8: b081 sub sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	764 eea: e001 b 0xef0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	765 eec: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	766 eee: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	767 ef0: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	768 ef2: 4843 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	769 ef4: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	770 ef6: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	771 ef8: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	772 efa: d202 bcs 0xf02
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	773 efc: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	774 efe: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	775 f00: dcf4 bgt 0xeec
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	776 f02: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	777 f04: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	778 f06: dd01 ble 0xf0c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	779 f08: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	780 f0a: e000 b 0xf0e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	781 f0c: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	782 f0e: b001 add sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	783 f10: 4770 bx lr
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	784
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	785 f12: b082 sub sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	786 f14: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	787 f16: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	788 f18: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	789 f1a: 7188 strb r0, [r1, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	790 f1c: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	791 f1e: 4839 ldr r0, =0xfffef000 ; via 0x1004
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	792 f20: 8800 ldrh r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	793 f22: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	794 f24: b002 add sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	795 f26: 4770 bx lr
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	796
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	797 f28: 00800100
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	798
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	799 ; This function (0xf2c) reprograms the UART selected by the 83FF00
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	800 ; var to the baud rate passed as arguments (div upper byte in R0,
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	801 ; lower byte in R1) and flushes the Rx FIFO.
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	802 f2c: b081 sub sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	803 f2e: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	804 f30: 7051 strb r1, [r2, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	805 f32: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	806 f34: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	807 f36: 4934 ldr r1, =0xffff6000 ; via 0x1008
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	808 f38: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	809 f3a: 880a ldrh r2, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	810 f3c: 4310 orr r0, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	811 f3e: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	812 f40: 4831 ldr r0, =0xffff6000 ; via 0x1008
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	813 f42: 8801 ldrh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	814 f44: 0849 lsr r1, r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	815 f46: 0049 lsl r1, r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	816 f48: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	817 f4a: 492f ldr r1, =0xffff6000 ; via 0x1008
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	818 f4c: 8808 ldrh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	819 f4e: 2202 mov r2, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	820 f50: 4390 bic r0, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	821 f52: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	822 f54: 482a ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	823 f56: 6801 ldr r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	824 f58: 2007 mov r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	825 f5a: 7208 strb r0, [r1, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	826 f5c: 4828 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	827 f5e: 6801 ldr r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	828 f60: 20bf mov r0, #191 ; 0xbf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	829 f62: 70c8 strb r0, [r1, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	830 f64: 4826 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	831 f66: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	832 f68: 1c80 add r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	833 f6a: 2110 mov r1, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	834 f6c: 8802 ldrh r2, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	835 f6e: 4311 orr r1, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	836 f70: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	837 f72: 4823 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	838 f74: 6801 ldr r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	839 f76: 2080 mov r0, #128 ; 0x80
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	840 f78: 70c8 strb r0, [r1, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	841 f7a: 4821 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	842 f7c: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	843 f7e: 2107 mov r1, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	844 f80: 7081 strb r1, [r0, #2]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	845 f82: 481f ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	846 f84: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	847 f86: 21bf mov r1, #191 ; 0xbf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	848 f88: 70c1 strb r1, [r0, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	849 f8a: 481d ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	850 f8c: 6801 ldr r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	851 f8e: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	852 f90: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	853 f92: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	854 f94: 481a ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	855 f96: 6801 ldr r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	856 f98: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	857 f9a: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	858 f9c: 7048 strb r0, [r1, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	859 f9e: 4818 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	860 fa0: 6801 ldr r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	861 fa2: 2003 mov r0, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	862 fa4: 70c8 strb r0, [r1, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	863 fa6: 4816 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	864 fa8: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	865 faa: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	866 fac: 7201 strb r1, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	867 fae: 4814 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	868 fb0: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	869 fb2: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	870 fb4: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	871 fb6: d309 bcc 0xfcc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	872 fb8: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	873 fba: 4811 ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	874 fbc: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	875 fbe: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	876 fc0: 7088 strb r0, [r1, #2]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	877 fc2: 480f ldr r0, =0x83ff00 ; via 0x1000
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	878 fc4: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	879 fc6: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	880 fc8: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	881 fca: d2f5 bcs 0xfb8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	882 fcc: b001 add sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	883 fce: 4770 bx lr
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	884
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	885 fd0: 480a ldr r0, =0x83ff80 ; via 0xffc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	886 fd2: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	887 fd4: 4770 bx lr
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	888
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	889 fd6: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	890 fd8: b081 sub sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	891 fda: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	892 fdc: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	893 fde: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	894 fe0: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	895 fe2: f7ff ff49 bl 0xe78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	896 fe6: b001 add sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	897 fe8: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	898 fea: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	899 fec: f7ff ff53 bl 0xe96
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	900 ff0: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	901 ff2: 46c0 nop (mov r8, r8)
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	902 ff4: 3ce0 sub r4, #224 ; 0xe0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	903 ff6: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	904 ff8: 0100 lsl r0, r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	905 ffa: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	906 ffc: ff80 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	907 ffe: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	908 1000: ff00 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	909 1002: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	910 1004: f000 fffe bl 0x2004
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	911 1008: 6000 str r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	912 100a: ffff <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	913 100c: 4700 bx r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	914 100e: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	915 1010: b08c sub sp, #48 ; 0x30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	916 1012: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	917 1014: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	918 1016: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	919 1018: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	920 101a: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	921 101c: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	922 101e: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	923 1020: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	924 1022: 9105 str r1, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	925 1024: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	926 1026: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	927 1028: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	928 102a: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	929 102c: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	930 102e: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	931 1030: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	932 1032: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	933 1034: e0a8 b 0x1188
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	934 1036: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	935 1038: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	936 103a: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	937 103c: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	938 103e: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	939 1040: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	940 1042: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	941 1044: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	942 1046: 8441 strh r1, [r0, #34] ; 0x22
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	943 1048: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	944 104a: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	945 104c: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	946 104e: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	947 1050: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	948 1052: 8401 strh r1, [r0, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	949 1054: 8c00 ldrh r0, [r0, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	950 1056: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	951 1058: 8c49 ldrh r1, [r1, #34] ; 0x22
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	952 105a: 0209 lsl r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	953 105c: 1840 add r0, r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	954 105e: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	955 1060: 8088 strh r0, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	956 1062: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	957 1064: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	958 1066: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	959 1068: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	960 106a: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	961 106c: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	962 106e: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	963 1070: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	964 1072: 7601 strb r1, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	965 1074: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	966 1076: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	967 1078: 7188 strb r0, [r1, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	968 107a: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	969 107c: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	970 107e: 2840 cmp r0, #64 ; 0x40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	971 1080: dc00 bgt 0x1084
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	972 1082: e09f b 0x11c4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	973 1084: 2004 mov r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	974 1086: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	975 1088: e09c b 0x11c4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	976 108a: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	977 108c: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	978 108e: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	979 1090: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	980 1092: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	981 1094: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	982 1096: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	983 1098: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	984 109a: 8441 strh r1, [r0, #34] ; 0x22
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	985 109c: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	986 109e: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	987 10a0: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	988 10a2: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	989 10a4: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	990 10a6: 8401 strh r1, [r0, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	991 10a8: 8c00 ldrh r0, [r0, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	992 10aa: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	993 10ac: 8c49 ldrh r1, [r1, #34] ; 0x22
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	994 10ae: 0209 lsl r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	995 10b0: 1841 add r1, r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	996 10b2: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	997 10b4: 8081 strh r1, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	998 10b6: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	999 10b8: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1000 10ba: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1001 10bc: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1002 10be: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1003 10c0: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1004 10c2: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1005 10c4: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1006 10c6: 7601 strb r1, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1007 10c8: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1008 10ca: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1009 10cc: 7188 strb r0, [r1, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1010 10ce: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1011 10d0: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1012 10d2: 2840 cmp r0, #64 ; 0x40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1013 10d4: dcd6 bgt 0x1084
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1014 10d6: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1015 10d8: 3008 add r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1016 10da: 9007 str r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1017 10dc: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1018 10de: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1019 10e0: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1020 10e2: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1021 10e4: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1022 10e6: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1023 10e8: da6c bge 0x11c4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1024 10ea: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1025 10ec: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1026 10ee: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1027 10f0: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1028 10f2: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1029 10f4: 84c1 strh r1, [r0, #38] ; 0x26
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1030 10f6: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1031 10f8: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1032 10fa: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1033 10fc: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1034 10fe: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1035 1100: 8481 strh r1, [r0, #36] ; 0x24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1036 1102: 9807 ldr r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1037 1104: 1c81 add r1, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1038 1106: 9107 str r1, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1039 1108: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1040 110a: 8c89 ldrh r1, [r1, #36] ; 0x24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1041 110c: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1042 110e: 8cd2 ldrh r2, [r2, #38] ; 0x26
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1043 1110: 0212 lsl r2, r2, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1044 1112: 1889 add r1, r1, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1045 1114: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1046 1116: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1047 1118: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1048 111a: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1049 111c: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1050 111e: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1051 1120: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1052 1122: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1053 1124: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1054 1126: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1055 1128: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1056 112a: dbde blt 0x10ea
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1057 112c: e04a b 0x11c4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1058 112e: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1059 1130: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1060 1132: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1061 1134: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1062 1136: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1063 1138: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1064 113a: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1065 113c: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1066 113e: 8501 strh r1, [r0, #40] ; 0x28
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1067 1140: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1068 1142: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1069 1144: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1070 1146: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1071 1148: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1072 114a: 8541 strh r1, [r0, #42] ; 0x2a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1073 114c: 8d41 ldrh r1, [r0, #42] ; 0x2a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1074 114e: 8d00 ldrh r0, [r0, #40] ; 0x28
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1075 1150: 0200 lsl r0, r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1076 1152: 1809 add r1, r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1077 1154: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1078 1156: 8081 strh r1, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1079 1158: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1080 115a: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1081 115c: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1082 115e: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1083 1160: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1084 1162: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1085 1164: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1086 1166: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1087 1168: 8581 strh r1, [r0, #44] ; 0x2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1088 116a: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1089 116c: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1090 116e: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1091 1170: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1092 1172: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1093 1174: 85c1 strh r1, [r0, #46] ; 0x2e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1094 1176: 8dc1 ldrh r1, [r0, #46] ; 0x2e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1095 1178: 8d80 ldrh r0, [r0, #44] ; 0x2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1096 117a: 0200 lsl r0, r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1097 117c: 1808 add r0, r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1098 117e: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1099 1180: 80c8 strh r0, [r1, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1100 1182: e01f b 0x11c4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1101 1184: 2008 mov r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1102 1186: e77e b 0x1086
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1103 1188: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1104 118a: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1105 118c: 290a cmp r1, #10 ; 0xa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1106 118e: d8f9 bhi 0x1184
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1107 1190: a001 add r0, pc, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1108 1192: 0089 lsl r1, r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1109 1194: 5840 ldr r0, [r0, r1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1110 1196: 4687 mov pc, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1111 1198: 11c4 asr r4, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1112 119a: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1113 119c: 11c4 asr r4, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1114 119e: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1115 11a0: 11c4 asr r4, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1116 11a2: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1117 11a4: 11c4 asr r4, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1118 11a6: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1119 11a8: 11c4 asr r4, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1120 11aa: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1121 11ac: 11c4 asr r4, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1122 11ae: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1123 11b0: 11c4 asr r4, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1124 11b2: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1125 11b4: 1036 asr r6, r6, #32
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1126 11b6: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1127 11b8: 108a asr r2, r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1128 11ba: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1129 11bc: 11c4 asr r4, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1130 11be: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1131 11c0: 112e asr r6, r5, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1132 11c2: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1133 11c4: 9905 ldr r1, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1134 11c6: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1135 11c8: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1136 11ca: d001 beq 0x11d0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1137 11cc: 2004 mov r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1138 11ce: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1139 11d0: 9803 ldr r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1140 11d2: b00c add sp, #48 ; 0x30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1141 11d4: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1142 11d6: b089 sub sp, #36 ; 0x24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1143 11d8: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1144 11da: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1145 11dc: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1146 11de: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1147 11e0: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1148 11e2: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1149 11e4: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1150 11e6: 9005 str r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1151 11e8: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1152 11ea: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1153 11ec: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1154 11ee: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1155 11f0: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1156 11f2: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1157 11f4: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1158 11f6: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1159 11f8: 7408 strb r0, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1160 11fa: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1161 11fc: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1162 11fe: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1163 1200: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1164 1202: 7849 ldrb r1, [r1, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1165 1204: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1166 1206: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1167 1208: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1168 120a: 7c00 ldrb r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1169 120c: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1170 120e: 7408 strb r0, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1171 1210: e0e4 b 0x13dc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1172 1212: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1173 1214: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1174 1216: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1175 1218: d000 beq 0x121c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1176 121a: e0fd b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1177 121c: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1178 121e: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1179 1220: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1180 1222: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1181 1224: 7909 ldrb r1, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1182 1226: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1183 1228: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1184 122a: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1185 122c: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1186 122e: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1187 1230: 7949 ldrb r1, [r1, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1188 1232: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1189 1234: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1190 1236: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1191 1238: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1192 123a: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1193 123c: 7989 ldrb r1, [r1, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1194 123e: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1195 1240: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1196 1242: 7c00 ldrb r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1197 1244: 3003 add r0, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1198 1246: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1199 1248: 7408 strb r0, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1200 124a: e0e5 b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1201 124c: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1202 124e: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1203 1250: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1204 1252: d000 beq 0x1256
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1205 1254: e0e0 b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1206 1256: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1207 1258: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1208 125a: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1209 125c: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1210 125e: 7909 ldrb r1, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1211 1260: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1212 1262: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1213 1264: 7c00 ldrb r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1214 1266: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1215 1268: e7ed b 0x1246
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1216 126a: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1217 126c: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1218 126e: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1219 1270: d000 beq 0x1274
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1220 1272: e0d1 b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1221 1274: e7ef b 0x1256
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1222 1276: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1223 1278: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1224 127a: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1225 127c: d000 beq 0x1280
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1226 127e: e0cb b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1227 1280: e7e9 b 0x1256
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1228 1282: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1229 1284: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1230 1286: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1231 1288: d000 beq 0x128c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1232 128a: e0c5 b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1233 128c: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1234 128e: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1235 1290: 8880 ldrh r0, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1236 1292: 8408 strh r0, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1237 1294: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1238 1296: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1239 1298: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1240 129a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1241 129c: 8c09 ldrh r1, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1242 129e: 0409 lsl r1, r1, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1243 12a0: 0e09 lsr r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1244 12a2: 0209 lsl r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1245 12a4: 1209 asr r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1246 12a6: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1247 12a8: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1248 12aa: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1249 12ac: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1250 12ae: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1251 12b0: 8c09 ldrh r1, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1252 12b2: 0609 lsl r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1253 12b4: 0e09 lsr r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1254 12b6: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1255 12b8: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1256 12ba: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1257 12bc: 88c0 ldrh r0, [r0, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1258 12be: 8408 strh r0, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1259 12c0: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1260 12c2: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1261 12c4: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1262 12c6: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1263 12c8: 8c09 ldrh r1, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1264 12ca: 0409 lsl r1, r1, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1265 12cc: 0e09 lsr r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1266 12ce: 0209 lsl r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1267 12d0: 1209 asr r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1268 12d2: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1269 12d4: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1270 12d6: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1271 12d8: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1272 12da: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1273 12dc: 8c09 ldrh r1, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1274 12de: 0609 lsl r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1275 12e0: 0e09 lsr r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1276 12e2: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1277 12e4: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1278 12e6: 7c00 ldrb r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1279 12e8: 3004 add r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1280 12ea: e7ac b 0x1246
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1281 12ec: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1282 12ee: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1283 12f0: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1284 12f2: d000 beq 0x12f6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1285 12f4: e090 b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1286 12f6: e7ae b 0x1256
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1287 12f8: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1288 12fa: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1289 12fc: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1290 12fe: d000 beq 0x1302
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1291 1300: e08a b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1292 1302: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1293 1304: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1294 1306: 7c00 ldrb r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1295 1308: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1296 130a: 7408 strb r0, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1297 130c: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1298 130e: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1299 1310: 7909 ldrb r1, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1300 1312: 7601 strb r1, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1301 1314: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1302 1316: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1303 1318: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1304 131a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1305 131c: 7e09 ldrb r1, [r1, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1306 131e: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1307 1320: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1308 1322: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1309 1324: 2840 cmp r0, #64 ; 0x40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1310 1326: dd01 ble 0x132c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1311 1328: 2004 mov r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1312 132a: e055 b 0x13d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1313 132c: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1314 132e: 3006 add r0, #6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1315 1330: 9007 str r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1316 1332: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1317 1334: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1318 1336: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1319 1338: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1320 133a: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1321 133c: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1322 133e: da6b bge 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1323 1340: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1324 1342: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1325 1344: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1326 1346: 9907 ldr r1, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1327 1348: 8809 ldrh r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1328 134a: 0409 lsl r1, r1, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1329 134c: 0e09 lsr r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1330 134e: 0209 lsl r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1331 1350: 1209 asr r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1332 1352: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1333 1354: 9807 ldr r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1334 1356: 8801 ldrh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1335 1358: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1336 135a: 9007 str r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1337 135c: 0608 lsl r0, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1338 135e: 0e01 lsr r1, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1339 1360: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1340 1362: 1c42 add r2, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1341 1364: 9201 str r2, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1342 1366: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1343 1368: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1344 136a: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1345 136c: 7c00 ldrb r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1346 136e: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1347 1370: 7408 strb r0, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1348 1372: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1349 1374: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1350 1376: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1351 1378: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1352 137a: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1353 137c: 7e00 ldrb r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1354 137e: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1355 1380: dbde blt 0x1340
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1356 1382: e049 b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1357 1384: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1358 1386: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1359 1388: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1360 138a: d145 bne 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1361 138c: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1362 138e: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1363 1390: 8880 ldrh r0, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1364 1392: 8408 strh r0, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1365 1394: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1366 1396: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1367 1398: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1368 139a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1369 139c: 8c09 ldrh r1, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1370 139e: 0409 lsl r1, r1, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1371 13a0: 0e09 lsr r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1372 13a2: 0209 lsl r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1373 13a4: 1209 asr r1, r1, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1374 13a6: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1375 13a8: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1376 13aa: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1377 13ac: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1378 13ae: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1379 13b0: 8c09 ldrh r1, [r1, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1380 13b2: 0609 lsl r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1381 13b4: 0e09 lsr r1, r1, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1382 13b6: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1383 13b8: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1384 13ba: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1385 13bc: 88c9 ldrh r1, [r1, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1386 13be: 8401 strh r1, [r0, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1387 13c0: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1388 13c2: 1c48 add r0, r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1389 13c4: 9001 str r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1390 13c6: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1391 13c8: 8c00 ldrh r0, [r0, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1392 13ca: 0400 lsl r0, r0, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1393 13cc: 0e00 lsr r0, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1394 13ce: 0200 lsl r0, r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1395 13d0: 1200 asr r0, r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1396 13d2: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1397 13d4: e77e b 0x12d4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1398 13d6: 2008 mov r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1399 13d8: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1400 13da: e01d b 0x1418
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1401 13dc: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1402 13de: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1403 13e0: 280a cmp r0, #10 ; 0xa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1404 13e2: d8f8 bhi 0x13d6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1405 13e4: a101 add r1, pc, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1406 13e6: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1407 13e8: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1408 13ea: 4687 mov pc, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1409 13ec: 1212 asr r2, r2, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1410 13ee: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1411 13f0: 124c asr r4, r1, #9
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1412 13f2: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1413 13f4: 126a asr r2, r5, #9
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1414 13f6: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1415 13f8: 1276 asr r6, r6, #9
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1416 13fa: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1417 13fc: 1418 asr r0, r3, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1418 13fe: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1419 1400: 1282 asr r2, r0, #10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1420 1402: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1421 1404: 12ec asr r4, r5, #11
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1422 1406: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1423 1408: 12f8 asr r0, r7, #11
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1424 140a: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1425 140c: 1418 asr r0, r3, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1426 140e: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1427 1410: 1384 asr r4, r0, #14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1428 1412: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1429 1414: 1418 asr r0, r3, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1430 1416: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1431 1418: 9805 ldr r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1432 141a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1433 141c: 7c09 ldrb r1, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1434 141e: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1435 1420: 9803 ldr r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1436 1422: b009 add sp, #36 ; 0x24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1437 1424: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1438 1426: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1439 1428: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1440 142a: b083 sub sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1441 142c: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1442 142e: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1443 1430: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1444 1432: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1445 1434: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1446 1436: e073 b 0x1520
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1447 1438: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1448 143a: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1449 143c: 28aa cmp r0, #170 ; 0xaa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1450 143e: d106 bne 0x144e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1451 1440: 4965 ldr r1, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1452 1442: 4865 ldr r0, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1453 1444: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1454 1446: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1455 1448: 07c0 lsl r0, r0, #31
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1456 144a: 0fc0 lsr r0, r0, #31
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1457 144c: e013 b 0x1476
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1458 144e: 4862 ldr r0, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1459 1450: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1460 1452: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1461 1454: d06b beq 0x152e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1462 1456: 4961 ldr r1, =0x83ff04 ; via 0x15dc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1463 1458: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1464 145a: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1465 145c: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1466 145e: 4960 ldr r1, =0x83ff0e ; via 0x15e0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1467 1460: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1468 1462: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1469 1464: 495f ldr r1, =0x83ff0c ; via 0x15e4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1470 1466: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1471 1468: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1472 146a: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1473 146c: 495a ldr r1, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1474 146e: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1475 1470: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1476 1472: 495d ldr r1, =0x83ff08 ; via 0x15e8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1477 1474: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1478 1476: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1479 1478: e059 b 0x152e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1480 147a: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1481 147c: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1482 147e: 28aa cmp r0, #170 ; 0xaa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1483 1480: d113 bne 0x14aa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1484 1482: 4855 ldr r0, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1485 1484: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1486 1486: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1487 1488: d00b beq 0x14a2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1488 148a: 4954 ldr r1, =0x83ff04 ; via 0x15dc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1489 148c: 6808 ldr r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1490 148e: 1c42 add r2, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1491 1490: 600a str r2, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1492 1492: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1493 1494: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1494 1496: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1495 1498: 4951 ldr r1, =0x83ff0e ; via 0x15e0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1496 149a: 7808 ldrb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1497 149c: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1498 149e: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1499 14a0: e013 b 0x14ca
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1500 14a2: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1501 14a4: 484c ldr r0, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1502 14a6: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1503 14a8: e01c b 0x14e4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1504 14aa: 484b ldr r0, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1505 14ac: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1506 14ae: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1507 14b0: d00d beq 0x14ce
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1508 14b2: 494a ldr r1, =0x83ff04 ; via 0x15dc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1509 14b4: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1510 14b6: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1511 14b8: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1512 14ba: 4849 ldr r0, =0x83ff0e ; via 0x15e0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1513 14bc: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1514 14be: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1515 14c0: 4948 ldr r1, =0x83ff0c ; via 0x15e4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1516 14c2: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1517 14c4: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1518 14c6: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1519 14c8: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1520 14ca: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1521 14cc: e7ea b 0x14a4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1522 14ce: 4843 ldr r0, =0x83ff04 ; via 0x15dc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1523 14d0: 6801 ldr r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1524 14d2: 1c4a add r2, r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1525 14d4: 6002 str r2, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1526 14d6: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1527 14d8: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1528 14da: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1529 14dc: 4940 ldr r1, =0x83ff0e ; via 0x15e0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1530 14de: 7808 ldrb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1531 14e0: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1532 14e2: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1533 14e4: 483f ldr r0, =0x83ff0c ; via 0x15e4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1534 14e6: 8801 ldrh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1535 14e8: 3901 sub r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1536 14ea: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1537 14ec: 483d ldr r0, =0x83ff0c ; via 0x15e4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1538 14ee: 8800 ldrh r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1539 14f0: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1540 14f2: d11c bne 0x152e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1541 14f4: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1542 14f6: 483a ldr r0, =0x83ff0e ; via 0x15e0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1543 14f8: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1544 14fa: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1545 14fc: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1546 14fe: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1547 1500: 4839 ldr r0, =0x83ff08 ; via 0x15e8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1548 1502: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1549 1504: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1550 1506: 4834 ldr r0, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1551 1508: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1552 150a: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1553 150c: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1554 150e: 2801 cmp r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1555 1510: d10d bne 0x152e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1556 1512: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1557 1514: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1558 1516: 28dd cmp r0, #221 ; 0xdd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1559 1518: d109 bne 0x152e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1560 151a: f7ff fb03 bl 0xb24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1561 151e: e006 b 0x152e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1562 1520: 4831 ldr r0, =0x83ff08 ; via 0x15e8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1563 1522: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1564 1524: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1565 1526: d087 beq 0x1438
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1566 1528: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1567 152a: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1568 152c: d0a5 beq 0x147a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1569 152e: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1570 1530: b003 add sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1571 1532: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1572 1534: b086 sub sp, #24 ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1573 1536: 9202 str r2, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1574 1538: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1575 153a: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1576 153c: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1577 153e: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1578 1540: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1579 1542: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1580 1544: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1581 1546: 9100 str r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1582 1548: 9005 str r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1583 154a: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1584 154c: 20aa mov r0, #170 ; 0xaa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1585 154e: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1586 1550: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1587 1552: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1588 1554: 9001 str r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1589 1556: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1590 1558: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1591 155a: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1592 155c: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1593 155e: 8188 strh r0, [r1, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1594 1560: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1595 1562: 8981 ldrh r1, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1596 1564: 9805 ldr r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1597 1566: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1598 1568: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1599 156a: da23 bge 0x15b4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1600 156c: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1601 156e: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1602 1570: 28aa cmp r0, #170 ; 0xaa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1603 1572: d108 bne 0x1586
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1604 1574: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1605 1576: 1c41 add r1, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1606 1578: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1607 157a: 21aa mov r1, #170 ; 0xaa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1608 157c: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1609 157e: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1610 1580: 8808 ldrh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1611 1582: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1612 1584: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1613 1586: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1614 1588: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1615 158a: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1616 158c: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1617 158e: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1618 1590: 1c42 add r2, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1619 1592: 9201 str r2, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1620 1594: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1621 1596: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1622 1598: 8808 ldrh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1623 159a: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1624 159c: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1625 159e: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1626 15a0: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1627 15a2: 8980 ldrh r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1628 15a4: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1629 15a6: 8188 strh r0, [r1, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1630 15a8: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1631 15aa: 8980 ldrh r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1632 15ac: 9905 ldr r1, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1633 15ae: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1634 15b0: 4288 cmp r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1635 15b2: dbdb blt 0x156c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1636 15b4: 9904 ldr r1, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1637 15b6: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1638 15b8: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1639 15ba: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1640 15bc: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1641 15be: 8808 ldrh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1642 15c0: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1643 15c2: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1644 15c4: b006 add sp, #24 ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1645 15c6: 4770 bx lr
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1646
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1647 ; function zeroes out IRAM word vars at 0x83ff08 and 0x83ff10
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1648 15c8: 4907 ldr r1, =0x83ff08 ; via 0x15e8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1649 15ca: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1650 15cc: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1651 15ce: 4802 ldr r0, =0x83ff10 ; via 0x15d8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1652 15d0: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1653 15d2: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1654 15d4: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1655 15d6: 46c0 nop (mov r8, r8)
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1656
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1657 15d8: 0083ff10
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1658 15dc: 0083ff04
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1659 15e0: 0083ff0e
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1660 15e4: 0083ff0c
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1661 15e8: 0083ff08
49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1662
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1663 15ec: b082 sub sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1664 15ee: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1665 15f0: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1666 15f2: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1667 15f4: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1668 15f6: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1669 15f8: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1670 15fa: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1671 15fc: 7041 strb r1, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1672 15fe: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1673 1600: 2102 mov r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1674 1602: 7101 strb r1, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1675 1604: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1676 1606: 2106 mov r1, #6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1677 1608: 7141 strb r1, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1678 160a: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1679 160c: 2102 mov r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1680 160e: 7181 strb r1, [r0, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1681 1610: b002 add sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1682 1612: 4770 bx lr
105 49c7cda96f04 C139 boot ROM fully cracked Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 104 diff changeset	1683
104 52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1684 1614: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1685 1616: b084 sub sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1686 1618: 466b mov r3, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1687 161a: 721a strb r2, [r3, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1688 161c: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1689 161e: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1690 1620: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1691 1622: 2009 mov r0, #9
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1692 1624: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1693 1626: e015 b 0x1654
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1694 1628: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1695 162a: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1696 162c: 7041 strb r1, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1697 162e: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1698 1630: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1699 1632: 8940 ldrh r0, [r0, #10] ; 0xa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1700 1634: 8088 strh r0, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1701 1636: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1702 1638: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1703 163a: 8980 ldrh r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1704 163c: 80c8 strh r0, [r1, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1705 163e: e01e b 0x167e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1706 1640: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1707 1642: e004 b 0x164e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1708 1644: 2103 mov r1, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1709 1646: e002 b 0x164e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1710 1648: 2105 mov r1, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1711 164a: e000 b 0x164e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1712 164c: 2106 mov r1, #6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1713 164e: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1714 1650: 7041 strb r1, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1715 1652: e014 b 0x167e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1716 1654: 200a mov r0, #10 ; 0xa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1717 1656: 4468 add r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1718 1658: a903 add r1, sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1719 165a: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1720 165c: 7a12 ldrb r2, [r2, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1721 165e: f000 fb71 bl 0x1d44
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1722 1662: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1723 1664: d0e0 beq 0x1628
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1724 1666: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1725 1668: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1726 166a: d0e9 beq 0x1640
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1727 166c: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1728 166e: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1729 1670: d0e8 beq 0x1644
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1730 1672: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1731 1674: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1732 1676: d0e7 beq 0x1648
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1733 1678: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1734 167a: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1735 167c: d0e6 beq 0x164c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1736 167e: b004 add sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1737 1680: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1738 1682: b084 sub sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1739 1684: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1740 1686: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1741 1688: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1742 168a: 200a mov r0, #10 ; 0xa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1743 168c: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1744 168e: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1745 1690: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1746 1692: 7041 strb r1, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1747 1694: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1748 1696: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1749 1698: 8880 ldrh r0, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1750 169a: 8108 strh r0, [r1, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1751 169c: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1752 169e: 88c0 ldrh r0, [r0, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1753 16a0: 8148 strh r0, [r1, #10] ; 0xa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1754 16a2: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1755 16a4: 8941 ldrh r1, [r0, #10] ; 0xa
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1756 16a6: 8900 ldrh r0, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1757 16a8: 0400 lsl r0, r0, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1758 16aa: 1808 add r0, r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1759 16ac: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1760 16ae: 9803 ldr r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1761 16b0: b004 add sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1762 16b2: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1763 16b4: b085 sub sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1764 16b6: 9303 str r3, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1765 16b8: 9202 str r2, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1766 16ba: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1767 16bc: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1768 16be: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1769 16c0: 48ea ldr r0, =0x83ff19 ; via 0x1a6c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1770 16c2: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1771 16c4: 7802 ldrb r2, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1772 16c6: 1889 add r1, r1, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1773 16c8: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1774 16ca: 48e9 ldr r0, =0x83ff1a ; via 0x1a70
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1775 16cc: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1776 16ce: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1777 16d0: d00e beq 0x16f0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1778 16d2: 48e8 ldr r0, =0x83ff26 ; via 0x1a74
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1779 16d4: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1780 16d6: 780a ldrb r2, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1781 16d8: 8801 ldrh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1782 16da: 1851 add r1, r2, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1783 16dc: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1784 16de: 9903 ldr r1, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1785 16e0: 48e4 ldr r0, =0x83ff26 ; via 0x1a74
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1786 16e2: 8800 ldrh r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1787 16e4: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1788 16e6: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1789 16e8: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1790 16ea: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1791 16ec: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1792 16ee: e009 b 0x1704
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1793 16f0: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1794 16f2: 6808 ldr r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1795 16f4: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1796 16f6: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1797 16f8: 49de ldr r1, =0x83ff26 ; via 0x1a74
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1798 16fa: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1799 16fc: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1800 16fe: 0200 lsl r0, r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1801 1700: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1802 1702: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1803 1704: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1804 1706: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1805 1708: 49d9 ldr r1, =0x83ff1a ; via 0x1a70
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1806 170a: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1807 170c: 4388 bic r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1808 170e: 49d8 ldr r1, =0x83ff1a ; via 0x1a70
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1809 1710: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1810 1712: 48d9 ldr r0, =0x83ff24 ; via 0x1a78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1811 1714: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1812 1716: 3901 sub r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1813 1718: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1814 171a: 48d7 ldr r0, =0x83ff24 ; via 0x1a78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1815 171c: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1816 171e: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1817 1720: d102 bne 0x1728
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1818 1722: 48d6 ldr r0, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1819 1724: 2106 mov r1, #6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1820 1726: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1821 1728: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1822 172a: b005 add sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1823 172c: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1824 172e: b083 sub sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1825 1730: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1826 1732: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1827 1734: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1828 1736: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1829 1738: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1830 173a: 48d1 ldr r0, =0x83ff1b ; via 0x1a80
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1831 173c: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1832 173e: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1833 1740: d10a bne 0x1758
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1834 1742: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1835 1744: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1836 1746: 2853 cmp r0, #83 ; 0x53
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1837 1748: d102 bne 0x1750
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1838 174a: 48cd ldr r0, =0x83ff1b ; via 0x1a80
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1839 174c: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1840 174e: e01a b 0x1786
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1841 1750: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1842 1752: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1843 1754: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1844 1756: e03b b 0x17d0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1845 1758: 49c9 ldr r1, =0x83ff1b ; via 0x1a80
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1846 175a: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1847 175c: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1848 175e: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1849 1760: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1850 1762: 2830 cmp r0, #48 ; 0x30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1851 1764: d111 bne 0x178a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1852 1766: 48c7 ldr r0, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1853 1768: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1854 176a: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1855 176c: d006 beq 0x177c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1856 176e: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1857 1770: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1858 1772: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1859 1774: 49c3 ldr r1, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1860 1776: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1861 1778: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1862 177a: e02a b 0x17d2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1863 177c: 48bf ldr r0, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1864 177e: 2102 mov r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1865 1780: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1866 1782: 48ef ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1867 1784: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1868 1786: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1869 1788: e024 b 0x17d4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1870 178a: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1871 178c: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1872 178e: 2833 cmp r0, #51 ; 0x33
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1873 1790: d105 bne 0x179e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1874 1792: 48bc ldr r0, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1875 1794: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1876 1796: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1877 1798: d0da beq 0x1750
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1878 179a: 2004 mov r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1879 179c: e00c b 0x17b8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1880 179e: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1881 17a0: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1882 17a2: 2837 cmp r0, #55 ; 0x37
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1883 17a4: d10e bne 0x17c4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1884 17a6: 48b7 ldr r0, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1885 17a8: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1886 17aa: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1887 17ac: d103 bne 0x17b6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1888 17ae: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1889 17b0: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1890 17b2: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1891 17b4: e00c b 0x17d0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1892 17b6: 2003 mov r0, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1893 17b8: 49b0 ldr r1, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1894 17ba: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1895 17bc: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1896 17be: 49e0 ldr r1, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1897 17c0: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1898 17c2: e007 b 0x17d4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1899 17c4: 9901 ldr r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1900 17c6: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1901 17c8: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1902 17ca: 48ae ldr r0, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1903 17cc: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1904 17ce: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1905 17d0: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1906 17d2: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1907 17d4: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1908 17d6: b003 add sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1909 17d8: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1910 17da: b083 sub sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1911 17dc: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1912 17de: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1913 17e0: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1914 17e2: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1915 17e4: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1916 17e6: 49d7 ldr r1, =0x830 ; via 0x1b44
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1917 17e8: 48d5 ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1918 17ea: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1919 17ec: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1920 17ee: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1921 17f0: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1922 17f2: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1923 17f4: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1924 17f6: d10d bne 0x1814
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1925 17f8: 49d1 ldr r1, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1926 17fa: 7808 ldrb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1927 17fc: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1928 17fe: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1929 1800: 48cf ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1930 1802: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1931 1804: 2807 cmp r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1932 1806: d10d bne 0x1824
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1933 1808: 489c ldr r0, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1934 180a: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1935 180c: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1936 180e: 489d ldr r0, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1937 1810: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1938 1812: e007 b 0x1824
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1939 1814: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1940 1816: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1941 1818: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1942 181a: 4998 ldr r1, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1943 181c: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1944 181e: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1945 1820: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1946 1822: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1947 1824: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1948 1826: b003 add sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1949 1828: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1950 182a: b083 sub sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1951 182c: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1952 182e: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1953 1830: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1954 1832: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1955 1834: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1956 1836: 49c4 ldr r1, =0x84c ; via 0x1b48
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1957 1838: 48c1 ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1958 183a: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1959 183c: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1960 183e: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1961 1840: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1962 1842: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1963 1844: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1964 1846: d112 bne 0x186e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1965 1848: 49bd ldr r1, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1966 184a: 7808 ldrb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1967 184c: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1968 184e: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1969 1850: 48bb ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1970 1852: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1971 1854: 2806 cmp r0, #6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1972 1856: d114 bne 0x1882
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1973 1858: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1974 185a: 2102 mov r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1975 185c: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1976 185e: 4887 ldr r0, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1977 1860: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1978 1862: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1979 1864: 4887 ldr r0, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1980 1866: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1981 1868: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1982 186a: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1983 186c: e008 b 0x1880
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1984 186e: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1985 1870: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1986 1872: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1987 1874: 4981 ldr r1, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1988 1876: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1989 1878: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1990 187a: 4982 ldr r1, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1991 187c: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1992 187e: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1993 1880: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1994 1882: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1995 1884: b003 add sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1996 1886: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1997 1888: b081 sub sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1998 188a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	1999 188c: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2000 188e: 497a ldr r1, =0x83ff24 ; via 0x1a78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2001 1890: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2002 1892: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2003 1894: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2004 1896: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2005 1898: 4874 ldr r0, =0x83ff19 ; via 0x1a6c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2006 189a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2007 189c: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2008 189e: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2009 18a0: 48a7 ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2010 18a2: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2011 18a4: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2012 18a6: 48e3 ldr r0, =0x83ff14 ; via 0x1c34
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2013 18a8: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2014 18aa: 4874 ldr r0, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2015 18ac: 2105 mov r1, #5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2016 18ae: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2017 18b0: b001 add sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2018 18b2: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2019 18b4: b084 sub sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2020 18b6: 9202 str r2, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2021 18b8: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2022 18ba: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2023 18bc: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2024 18be: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2025 18c0: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2026 18c2: 496d ldr r1, =0x83ff24 ; via 0x1a78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2027 18c4: 7808 ldrb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2028 18c6: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2029 18c8: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2030 18ca: 486b ldr r0, =0x83ff24 ; via 0x1a78
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2031 18cc: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2032 18ce: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2033 18d0: d026 beq 0x1920
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2034 18d2: 4866 ldr r0, =0x83ff19 ; via 0x1a6c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2035 18d4: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2036 18d6: 780a ldrb r2, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2037 18d8: 7801 ldrb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2038 18da: 1851 add r1, r2, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2039 18dc: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2040 18de: 4998 ldr r1, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2041 18e0: 7808 ldrb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2042 18e2: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2043 18e4: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2044 18e6: 49d3 ldr r1, =0x83ff14 ; via 0x1c34
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2045 18e8: 2204 mov r2, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2046 18ea: 4895 ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2047 18ec: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2048 18ee: 1a10 sub r0, r2, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2049 18f0: 00c2 lsl r2, r0, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2050 18f2: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2051 18f4: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2052 18f6: 4090 lsl r0, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2053 18f8: 680a ldr r2, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2054 18fa: 1880 add r0, r0, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2055 18fc: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2056 18fe: 4890 ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2057 1900: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2058 1902: 2804 cmp r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2059 1904: d117 bne 0x1936
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2060 1906: 9902 ldr r1, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2061 1908: 48ca ldr r0, =0x83ff14 ; via 0x1c34
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2062 190a: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2063 190c: 3802 sub r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2064 190e: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2065 1910: 485a ldr r0, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2066 1912: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2067 1914: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2068 1916: 4856 ldr r0, =0x83ff1a ; via 0x1a70
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2069 1918: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2070 191a: 4889 ldr r0, =0x83ff1c ; via 0x1b40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2071 191c: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2072 191e: e00a b 0x1936
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2073 1920: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2074 1922: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2075 1924: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2076 1926: 4955 ldr r1, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2077 1928: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2078 192a: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2079 192c: 4855 ldr r0, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2080 192e: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2081 1930: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2082 1932: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2083 1934: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2084 1936: 9803 ldr r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2085 1938: b004 add sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2086 193a: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2087 193c: b083 sub sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2088 193e: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2089 1940: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2090 1942: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2091 1944: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2092 1946: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2093 1948: 494c ldr r1, =0x83ff20 ; via 0x1a7c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2094 194a: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2095 194c: 20ff mov r0, #255 ; 0xff
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2096 194e: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2097 1950: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2098 1952: 4388 bic r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2099 1954: 4945 ldr r1, =0x83ff19 ; via 0x1a6c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2100 1956: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2101 1958: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2102 195a: d007 beq 0x196c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2103 195c: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2104 195e: 2101 mov r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2105 1960: 6001 str r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2106 1962: 4848 ldr r0, =0x83ff18 ; via 0x1a84
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2107 1964: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2108 1966: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2109 1968: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2110 196a: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2111 196c: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2112 196e: b003 add sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2113 1970: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2114 1972: b085 sub sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2115 1974: 466b mov r3, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2116 1976: 719a strb r2, [r3, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2117 1978: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2118 197a: 8091 strh r1, [r2, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2119 197c: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2120 197e: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2121 1980: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2122 1982: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2123 1984: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2124 1986: 8880 ldrh r0, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2125 1988: 8208 strh r0, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2126 198a: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2127 198c: 8a00 ldrh r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2128 198e: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2129 1990: d01e beq 0x19d0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2130 1992: 49e3 ldr r1, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2131 1994: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2132 1996: 7980 ldrb r0, [r0, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2133 1998: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2134 199a: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2135 199c: 7941 ldrb r1, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2136 199e: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2137 19a0: 7301 strb r1, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2138 19a2: 7b00 ldrb r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2139 19a4: 0980 lsr r0, r0, #6
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2140 19a6: d3f4 bcc 0x1992
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2141 19a8: 49dd ldr r1, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2142 19aa: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2143 19ac: 7980 ldrb r0, [r0, #6]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2144 19ae: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2145 19b0: 5809 ldr r1, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2146 19b2: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2147 19b4: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2148 19b6: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2149 19b8: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2150 19ba: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2151 19bc: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2152 19be: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2153 19c0: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2154 19c2: 8a00 ldrh r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2155 19c4: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2156 19c6: 8208 strh r0, [r1, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2157 19c8: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2158 19ca: 8a00 ldrh r0, [r0, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2159 19cc: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2160 19ce: d1e0 bne 0x1992
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2161 19d0: b005 add sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2162 19d2: 46f7 mov pc, lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2163 19d4: b082 sub sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2164 19d6: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2165 19d8: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2166 19da: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2167 19dc: 8088 strh r0, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2168 19de: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2169 19e0: 8881 ldrh r1, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2170 19e2: 20ff mov r0, #255 ; 0xff
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2171 19e4: 30f5 add r0, #245 ; 0xf5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2172 19e6: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2173 19e8: da21 bge 0x1a2e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2174 19ea: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2175 19ec: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2176 19ee: 8880 ldrh r0, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2177 19f0: 3001 add r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2178 19f2: 8088 strh r0, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2179 19f4: 48ca ldr r0, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2180 19f6: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2181 19f8: 0089 lsl r1, r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2182 19fa: 5840 ldr r0, [r0, r1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2183 19fc: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2184 19fe: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2185 1a00: 7048 strb r0, [r1, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2186 1a02: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2187 1a04: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2188 1a06: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2189 1a08: d30b bcc 0x1a22
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2190 1a0a: 49c5 ldr r1, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2191 1a0c: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2192 1a0e: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2193 1a10: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2194 1a12: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2195 1a14: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2196 1a16: 0600 lsl r0, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2197 1a18: 0e00 lsr r0, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2198 1a1a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2199 1a1c: 7088 strb r0, [r1, #2]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2200 1a1e: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2201 1a20: 8088 strh r0, [r1, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2202 1a22: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2203 1a24: 8881 ldrh r1, [r0, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2204 1a26: 20ff mov r0, #255 ; 0xff
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2205 1a28: 30f5 add r0, #245 ; 0xf5
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2206 1a2a: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2207 1a2c: dbdd blt 0x19ea
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2208 1a2e: b002 add sp, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2209 1a30: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2210 1a32: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2211 1a34: b08c sub sp, #48 ; 0x30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2212 1a36: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2213 1a38: 7111 strb r1, [r2, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2214 1a3a: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2215 1a3c: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2216 1a3e: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2217 1a40: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2218 1a42: a904 add r1, sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2219 1a44: aa03 add r2, sp, #12 ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2220 1a46: f7ff fd75 bl 0x1534
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2221 1a4a: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2222 1a4c: 8980 ldrh r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2223 1a4e: 2820 cmp r0, #32 ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2224 1a50: dd02 ble 0x1a58
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2225 1a52: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2226 1a54: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2227 1a56: e006 b 0x1a66
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2228 1a58: a804 add r0, sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2229 1a5a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2230 1a5c: 8989 ldrh r1, [r1, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2231 1a5e: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2232 1a60: 7912 ldrb r2, [r2, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2233 1a62: f7ff ff86 bl 0x1972
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2234 1a66: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2235 1a68: b00c add sp, #48 ; 0x30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2236 1a6a: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2237 1a6c: ff19 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2238 1a6e: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2239 1a70: ff1a <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2240 1a72: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2241 1a74: ff26 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2242 1a76: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2243 1a78: ff24 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2244 1a7a: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2245 1a7c: ff20 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2246 1a7e: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2247 1a80: ff1b <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2248 1a82: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2249 1a84: ff18 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2250 1a86: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2251 1a88: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2252 1a8a: b084 sub sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2253 1a8c: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2254 1a8e: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2255 1a90: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2256 1a92: 20ff mov r0, #255 ; 0xff
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2257 1a94: 7308 strb r0, [r1, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2258 1a96: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2259 1a98: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2260 1a9a: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2261 1a9c: 48a1 ldr r0, =0xffff5805 ; via 0x1d24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2262 1a9e: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2263 1aa0: 7348 strb r0, [r1, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2264 1aa2: 48a1 ldr r0, =0xffff5005 ; via 0x1d28
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2265 1aa4: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2266 1aa6: 7388 strb r0, [r1, #14] ; 0xe
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2267 1aa8: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2268 1aaa: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2269 1aac: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2270 1aae: d206 bcs 0x1abe
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2271 1ab0: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2272 1ab2: 7b80 ldrb r0, [r0, #14] ; 0xe
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2273 1ab4: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2274 1ab6: d202 bcs 0x1abe
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2275 1ab8: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2276 1aba: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2277 1abc: d0ed beq 0x1a9a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2278 1abe: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2279 1ac0: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2280 1ac2: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2281 1ac4: d316 bcc 0x1af4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2282 1ac6: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2283 1ac8: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2284 1aca: 7308 strb r0, [r1, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2285 1acc: 4994 ldr r1, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2286 1ace: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2287 1ad0: 7b00 ldrb r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2288 1ad2: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2289 1ad4: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2290 1ad6: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2291 1ad8: 0600 lsl r0, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2292 1ada: 0e00 lsr r0, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2293 1adc: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2294 1ade: 73c8 strb r0, [r1, #15] ; 0xf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2295 1ae0: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2296 1ae2: 7bc0 ldrb r0, [r0, #15] ; 0xf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2297 1ae4: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2298 1ae6: f7ff fc9f bl 0x1428
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2299 1aea: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2300 1aec: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2301 1aee: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2302 1af0: d11c bne 0x1b2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2303 1af2: e018 b 0x1b26
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2304 1af4: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2305 1af6: 7b80 ldrb r0, [r0, #14] ; 0xe
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2306 1af8: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2307 1afa: d317 bcc 0x1b2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2308 1afc: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2309 1afe: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2310 1b00: 7308 strb r0, [r1, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2311 1b02: 4987 ldr r1, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2312 1b04: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2313 1b06: 7b00 ldrb r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2314 1b08: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2315 1b0a: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2316 1b0c: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2317 1b0e: 0600 lsl r0, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2318 1b10: 0e01 lsr r1, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2319 1b12: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2320 1b14: 73c1 strb r1, [r0, #15] ; 0xf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2321 1b16: 7bc0 ldrb r0, [r0, #15] ; 0xf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2322 1b18: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2323 1b1a: f7ff fc85 bl 0x1428
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2324 1b1e: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2325 1b20: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2326 1b22: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2327 1b24: d102 bne 0x1b2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2328 1b26: 20ff mov r0, #255 ; 0xff
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2329 1b28: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2330 1b2a: 7308 strb r0, [r1, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2331 1b2c: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2332 1b2e: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2333 1b30: d102 bne 0x1b38
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2334 1b32: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2335 1b34: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2336 1b36: d0b0 beq 0x1a9a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2337 1b38: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2338 1b3a: 7b00 ldrb r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2339 1b3c: b004 add sp, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2340 1b3e: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2341 1b40: ff1c <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2342 1b42: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2343 1b44: 0830 lsr r0, r6, #32
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2344 1b46: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2345 1b48: 084c lsr r4, r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2346 1b4a: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2347 1b4c: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2348 1b4e: b086 sub sp, #24 ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2349 1b50: 466b mov r3, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2350 1b52: 721a strb r2, [r3, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2351 1b54: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2352 1b56: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2353 1b58: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2354 1b5a: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2355 1b5c: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2356 1b5e: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2357 1b60: d05b beq 0x1c1a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2358 1b62: 496f ldr r1, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2359 1b64: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2360 1b66: 7a00 ldrb r0, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2361 1b68: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2362 1b6a: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2363 1b6c: 7941 ldrb r1, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2364 1b6e: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2365 1b70: 7301 strb r1, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2366 1b72: 7b00 ldrb r0, [r0, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2367 1b74: 0840 lsr r0, r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2368 1b76: d3f4 bcc 0x1b62
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2369 1b78: 4969 ldr r1, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2370 1b7a: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2371 1b7c: 7a00 ldrb r0, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2372 1b7e: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2373 1b80: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2374 1b82: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2375 1b84: 0600 lsl r0, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2376 1b86: 0e01 lsr r1, r0, #24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2377 1b88: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2378 1b8a: 7341 strb r1, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2379 1b8c: e02c b 0x1be8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2380 1b8e: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2381 1b90: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2382 1b92: a905 add r1, sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2383 1b94: 9a00 ldr r2, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2384 1b96: 9b01 ldr r3, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2385 1b98: f7ff fd8c bl 0x16b4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2386 1b9c: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2387 1b9e: e039 b 0x1c14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2388 1ba0: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2389 1ba2: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2390 1ba4: a905 add r1, sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2391 1ba6: f7ff fdc2 bl 0x172e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2392 1baa: e7f7 b 0x1b9c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2393 1bac: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2394 1bae: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2395 1bb0: a905 add r1, sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2396 1bb2: f7ff fe12 bl 0x17da
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2397 1bb6: e7f1 b 0x1b9c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2398 1bb8: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2399 1bba: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2400 1bbc: a905 add r1, sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2401 1bbe: f7ff fe34 bl 0x182a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2402 1bc2: e7eb b 0x1b9c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2403 1bc4: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2404 1bc6: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2405 1bc8: f7ff fe5e bl 0x1888
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2406 1bcc: e022 b 0x1c14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2407 1bce: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2408 1bd0: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2409 1bd2: a905 add r1, sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2410 1bd4: 9a00 ldr r2, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2411 1bd6: f7ff fe6d bl 0x18b4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2412 1bda: e7df b 0x1b9c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2413 1bdc: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2414 1bde: 7b40 ldrb r0, [r0, #13] ; 0xd
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2415 1be0: a905 add r1, sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2416 1be2: f7ff feab bl 0x193c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2417 1be6: e7d9 b 0x1b9c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2418 1be8: 4850 ldr r0, =0x83ff20 ; via 0x1d2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2419 1bea: 6800 ldr r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2420 1bec: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2421 1bee: d0ce beq 0x1b8e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2422 1bf0: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2423 1bf2: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2424 1bf4: d0d4 beq 0x1ba0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2425 1bf6: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2426 1bf8: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2427 1bfa: d0d7 beq 0x1bac
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2428 1bfc: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2429 1bfe: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2430 1c00: d0da beq 0x1bb8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2431 1c02: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2432 1c04: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2433 1c06: d0dd beq 0x1bc4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2434 1c08: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2435 1c0a: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2436 1c0c: d0df beq 0x1bce
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2437 1c0e: 3801 sub r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2438 1c10: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2439 1c12: d0e3 beq 0x1bdc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2440 1c14: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2441 1c16: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2442 1c18: d1a3 bne 0x1b62
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2443 1c1a: 9805 ldr r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2444 1c1c: b006 add sp, #24 ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2445 1c1e: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2446 1c20: 4942 ldr r1, =0x83ff20 ; via 0x1d2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2447 1c22: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2448 1c24: 6008 str r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2449 1c26: 4842 ldr r0, =0x83ff1b ; via 0x1d30
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2450 1c28: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2451 1c2a: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2452 1c2c: 4841 ldr r0, =0x83ff18 ; via 0x1d34
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2453 1c2e: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2454 1c30: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2455 1c32: 46c0 nop (mov r8, r8)
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2456
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2457 1c34: 0083ff14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2458
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2459 ; UART initialization routine
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2460 1c38: b081 sub sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2461 ; MODEM UART
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2462 1c3a: 483f ldr r0, =0xffff5800 ; via 0x1d38
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2463 1c3c: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2464 ; switch to MCU control
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2465 1c3e: 493f ldr r1, =0xffff6000 ; via 0x1d3c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2466 1c40: 2002 mov r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2467 1c42: 880a ldrh r2, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2468 1c44: 4310 orr r0, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2469 1c46: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2470 1c48: 483c ldr r0, =0xffff6000 ; via 0x1d3c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2471 1c4a: 8801 ldrh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2472 1c4c: 0849 lsr r1, r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2473 1c4e: 0049 lsl r1, r1, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2474 1c50: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2475 1c52: 493a ldr r1, =0xffff6000 ; via 0x1d3c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2476 1c54: 8808 ldrh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2477 1c56: 2202 mov r2, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2478 1c58: 4390 bic r0, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2479 1c5a: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2480 ; MDR1 = reset/default state
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2481 1c5c: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2482 1c5e: 2007 mov r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2483 1c60: 7208 strb r0, [r1, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2484 ; LCR = BF
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2485 1c62: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2486 1c64: 20bf mov r0, #191 ; 0xbf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2487 1c66: 70c8 strb r0, [r1, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2488 ; set ENHANCED_EN bit in EFR
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2489 1c68: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2490 1c6a: 1c81 add r1, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2491 1c6c: 2010 mov r0, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2492 1c6e: 880a ldrh r2, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2493 1c70: 4310 orr r0, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2494 1c72: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2495 ; LCR = 80
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2496 1c74: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2497 1c76: 2180 mov r1, #128 ; 0x80
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2498 1c78: 70c1 strb r1, [r0, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2499 ; FCR = 07 (enable and clear both FIFOs)
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2500 1c7a: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2501 1c7c: 2107 mov r1, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2502 1c7e: 7081 strb r1, [r0, #2]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2503 ; LCR = BF
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2504 1c80: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2505 1c82: 21bf mov r1, #191 ; 0xbf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2506 1c84: 70c1 strb r1, [r0, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2507 ; baud rate divisor set to 7 (115200 baud)
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2508 1c86: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2509 1c88: 2107 mov r1, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2510 1c8a: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2511 1c8c: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2512 1c8e: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2513 1c90: 7041 strb r1, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2514 ; LCR = 03 (standard setting)
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2515 1c92: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2516 1c94: 2103 mov r1, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2517 1c96: 70c1 strb r1, [r0, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2518 ; MDR1 = UART mode
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2519 1c98: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2520 1c9a: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2521 1c9c: 7201 strb r1, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2522 ; IrDA UART - same setup as for MODEM
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2523 1c9e: 4828 ldr r0, =0xffff5000 ; via 0x1d40
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2524 1ca0: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2525 1ca2: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2526 1ca4: 2107 mov r1, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2527 1ca6: 7201 strb r1, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2528 1ca8: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2529 1caa: 20bf mov r0, #191 ; 0xbf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2530 1cac: 70c8 strb r0, [r1, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2531 1cae: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2532 1cb0: 1c80 add r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2533 1cb2: 2110 mov r1, #16 ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2534 1cb4: 8802 ldrh r2, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2535 1cb6: 4311 orr r1, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2536 1cb8: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2537 1cba: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2538 1cbc: 2180 mov r1, #128 ; 0x80
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2539 1cbe: 70c1 strb r1, [r0, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2540 1cc0: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2541 1cc2: 2107 mov r1, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2542 1cc4: 7081 strb r1, [r0, #2]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2543 1cc6: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2544 1cc8: 21bf mov r1, #191 ; 0xbf
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2545 1cca: 70c1 strb r1, [r0, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2546 1ccc: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2547 1cce: 2107 mov r1, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2548 1cd0: 7001 strb r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2549 1cd2: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2550 1cd4: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2551 1cd6: 7041 strb r1, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2552 1cd8: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2553 1cda: 2003 mov r0, #3
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2554 1cdc: 70c8 strb r0, [r1, #3]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2555 1cde: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2556 1ce0: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2557 1ce2: 7201 strb r1, [r0, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2558 1ce4: b001 add sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2559 1ce6: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2560
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2561 1ce8: b081 sub sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2562 1cea: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2563 1cec: 7008 strb r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2564 1cee: 490c ldr r1, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2565 1cf0: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2566 1cf2: 7800 ldrb r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2567 1cf4: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2568 1cf6: 5808 ldr r0, [r1, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2569 1cf8: 7941 ldrb r1, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2570 1cfa: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2571 1cfc: 7041 strb r1, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2572 1cfe: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2573 1d00: 09c0 lsr r0, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2574 1d02: d20b bcs 0x1d1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2575 1d04: 4806 ldr r0, =0x864 ; via 0x1d20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2576 1d06: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2577 1d08: 7809 ldrb r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2578 1d0a: 0089 lsl r1, r1, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2579 1d0c: 5840 ldr r0, [r0, r1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2580 1d0e: 7940 ldrb r0, [r0, #5]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2581 1d10: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2582 1d12: 7048 strb r0, [r1, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2583 1d14: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2584 1d16: 7840 ldrb r0, [r0, #1]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2585 1d18: 09c0 lsr r0, r0, #7
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2586 1d1a: d3f3 bcc 0x1d04
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2587 1d1c: b001 add sp, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2588 1d1e: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2589 1d20: 0864 lsr r4, r4, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2590 1d22: 0000 lsl r0, r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2591 1d24: 5805 ldr r5, [r0, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2592 1d26: ffff <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2593 1d28: 5005 str r5, [r0, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2594 1d2a: ffff <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2595 1d2c: ff20 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2596 1d2e: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2597 1d30: ff1b <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2598 1d32: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2599 1d34: ff18 <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2600 1d36: 0083 lsl r3, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2601 1d38: 5800 ldr r0, [r0, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2602 1d3a: ffff <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2603 1d3c: 6000 str r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2604 1d3e: ffff <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2605 1d40: 5000 str r0, [r0, r0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2606 1d42: ffff <half-bl>
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2607 1d44: b500 push {lr}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2608 1d46: b087 sub sp, #28 ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2609 1d48: 466b mov r3, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2610 1d4a: 721a strb r2, [r3, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2611 1d4c: 9101 str r1, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2612 1d4e: 9000 str r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2613 1d50: 9900 ldr r1, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2614 1d52: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2615 1d54: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2616 1d56: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2617 1d58: 2100 mov r1, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2618 1d5a: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2619 1d5c: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2620 1d5e: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2621 1d60: f7ff ff5e bl 0x1c20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2622 1d64: a805 add r0, sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2623 1d66: a906 add r1, sp, #24 ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2624 1d68: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2625 1d6a: 7a12 ldrb r2, [r2, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2626 1d6c: f7ff feee bl 0x1b4c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2627 1d70: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2628 1d72: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2629 1d74: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2630 1d76: d11f bne 0x1db8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2631 1d78: 9803 ldr r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2632 1d7a: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2633 1d7c: d11c bne 0x1db8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2634 1d7e: 9800 ldr r0, [sp, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2635 1d80: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2636 1d82: 8b0a ldrh r2, [r1, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2637 1d84: 8801 ldrh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2638 1d86: 1851 add r1, r2, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2639 1d88: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2640 1d8a: 9905 ldr r1, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2641 1d8c: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2642 1d8e: 8b00 ldrh r0, [r0, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2643 1d90: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2644 1d92: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2645 1d94: 9905 ldr r1, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2646 1d96: 8809 ldrh r1, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2647 1d98: 8802 ldrh r2, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2648 1d9a: 1889 add r1, r1, r2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2649 1d9c: 8001 strh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2650 1d9e: a805 add r0, sp, #20 ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2651 1da0: a906 add r1, sp, #24 ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2652 1da2: 466a mov r2, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2653 1da4: 7a12 ldrb r2, [r2, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2654 1da6: f7ff fed1 bl 0x1b4c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2655 1daa: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2656 1dac: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2657 1dae: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2658 1db0: d102 bne 0x1db8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2659 1db2: 9803 ldr r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2660 1db4: 2800 cmp r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2661 1db6: d0e2 beq 0x1d7e
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2662 1db8: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2663 1dba: 2801 cmp r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2664 1dbc: d101 bne 0x1dc2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2665 1dbe: 2004 mov r0, #4
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2666 1dc0: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2667 1dc2: 9803 ldr r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2668 1dc4: b007 add sp, #28 ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2669 1dc6: bd00 pop {pc}
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2670 1dc8: b089 sub sp, #36 ; 0x24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2671 1dca: 201a mov r0, #26 ; 0x1a
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2672 1dcc: 9005 str r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2673 1dce: 2018 mov r0, #24 ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2674 1dd0: 9006 str r0, [sp, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2675 1dd2: 2000 mov r0, #0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2676 1dd4: 9008 str r0, [sp, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2677 1dd6: 4669 mov r1, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2678 1dd8: 9805 ldr r0, [sp, #20] ; 0x14
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2679 1dda: 8800 ldrh r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2680 1ddc: 8008 strh r0, [r1, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2681 1dde: 9806 ldr r0, [sp, #24] ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2682 1de0: 8800 ldrh r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2683 1de2: 8048 strh r0, [r1, #2]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2684 1de4: 4668 mov r0, sp
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2685 1de6: 8841 ldrh r1, [r0, #2]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2686 1de8: 8800 ldrh r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2687 1dea: 0400 lsl r0, r0, #16
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2688 1dec: 1808 add r0, r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2689 1dee: 9001 str r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2690 1df0: 9801 ldr r0, [sp, #4]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2691 1df2: 0200 lsl r0, r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2692 1df4: 0a00 lsr r0, r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2693 1df6: 0080 lsl r0, r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2694 1df8: 3008 add r0, #8
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2695 1dfa: 9007 str r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2696 1dfc: 9807 ldr r0, [sp, #28] ; 0x1c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2697 1dfe: 3018 add r0, #24 ; 0x18
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2698 1e00: 9002 str r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2699 1e02: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2700 1e04: 9004 str r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2701 1e06: 9802 ldr r0, [sp, #8]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2702 1e08: 3002 add r0, #2
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2703 1e0a: 9003 str r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2704 1e0c: 9803 ldr r0, [sp, #12] ; 0xc
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2705 1e0e: 8801 ldrh r1, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2706 1e10: 4806 ldr r0, =0xffff ; via 0x1e2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2707 1e12: 4281 cmp r1, r0
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2708 1e14: d104 bne 0x1e20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2709 1e16: 9804 ldr r0, [sp, #16] ; 0x10
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2710 1e18: 8800 ldrh r0, [r0, #0]
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2711 1e1a: 4904 ldr r1, =0xffff ; via 0x1e2c
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2712 1e1c: 4288 cmp r0, r1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2713 1e1e: d001 beq 0x1e24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2714 1e20: 2001 mov r0, #1
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2715 1e22: 9008 str r0, [sp, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2716 1e24: 9808 ldr r0, [sp, #32] ; 0x20
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2717 1e26: b009 add sp, #36 ; 0x24
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2718 1e28: 4770 bx lr
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2719 1e2a: 46c0 nop (mov r8, r8)
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2720
52cec4b71cfe C139 boot re: got to UART initialization Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 102 diff changeset	2721 1e2c: 0000ffff
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2722
102 44db5922ab8f c139 boot re: entry code analyzed Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 100 diff changeset	2723 ; ARM->Thumb call veneer around 0xad2 routine
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2724 1e30: e92d4000 stmdb sp!, {lr}
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2725 1e34: e28fe001 add lr, pc, #1 ; 0x1
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2726 1e38: e12fff1e bx lr
100 ec90136f07a6 C139 boot re: use thumbdis Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 99 diff changeset	2727 1e3c: f7fe fe49 bl 0xad2
84 8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2728 1e40: 4778 bx pc
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2729 1e42: 46c0 nop (mov r8, r8)
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2730 1e44: e8bd8000 ldmia sp!, {pc}
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2731
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2732 <1E48-1EFF: all FFs>
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2733
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2734 1f00: 00000001
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2735
8b15a0969c9e beginning of C139 boot ROM re Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2736 <1F04-end: all FFs>

FreeCalypso > hg > freecalypso-reveng

annotate compal/c139-boot.disasm @ 105:49c7cda96f04