FreeCalypso > hg > freecalypso-reveng
annotate arm7dis/armdis.c @ 93:5ebebbc74622
armdis: buglet in literal pool handling: forgot to add base_vma
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Sun, 30 Mar 2014 01:55:46 +0000 |
parents | 708f2452d1ae |
children | 915e2ca2813d |
rev | line source |
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1 #include <sys/types.h> |
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2 #include <stdio.h> |
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3 #include <stdlib.h> |
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4 #include <string.h> |
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5 #include <strings.h> |
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6 |
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7 extern char *binfilename; |
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8 extern u_char *filemap; |
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9 extern unsigned disasm_len, base_vma; |
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10 |
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11 extern unsigned get_u16(), get_u32(); |
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12 |
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13 extern char *regnames[16], *condition_decode[16]; |
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14 |
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15 static char *dataproc_ops[16] = {"and", "eor", "sub", "rsb", |
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16 "add", "adc", "sbc", "rsc", |
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17 "tst", "teq", "cmp", "cmn", |
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18 "orr", "mov", "bic", "mvn"}; |
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19 static char *shift_types[4] = {"lsl", "lsr", "asr", "ror"}; |
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20 |
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21 static void |
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22 arm_branch(off, word) |
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23 unsigned off, word; |
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24 { |
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25 unsigned dest; |
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26 |
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27 dest = (word & 0x00FFFFFF) << 2; |
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28 if (dest & 0x02000000) |
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29 dest |= 0xFC000000; |
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30 dest += base_vma + off + 8; |
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31 printf("b%s%s\t0x%x\n", word&0x1000000 ? "l" : "", |
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32 condition_decode[word>>28], dest); |
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33 } |
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34 |
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35 static void |
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36 op2_immed(word) |
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37 unsigned word; |
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38 { |
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39 unsigned low8, rot, val; |
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40 |
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41 low8 = word & 0xFF; |
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42 rot = (word & 0xF00) >> 7; |
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43 val = (low8 << (32 - rot)) | (low8 >> rot); |
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44 if (val <= 9) |
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45 printf("#%u\n", val); |
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46 else |
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47 printf("#%u\t; 0x%x\n", val, val); |
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48 } |
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49 |
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50 static void |
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51 op2_regbyconst(word) |
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52 unsigned word; |
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53 { |
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54 unsigned c, t; |
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55 |
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56 c = (word >> 7) & 0x1F; |
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57 t = (word >> 5) & 3; |
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58 if (!c) { |
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59 switch (t) { |
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60 case 0: |
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61 printf("%s", regnames[word&0xF]); |
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62 return; |
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63 case 3: |
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64 printf("%s, rrx", regnames[word&0xF]); |
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65 return; |
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66 default: |
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67 c = 32; |
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68 } |
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69 } |
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70 printf("%s, %s #%u", regnames[word&0xF], shift_types[t], c); |
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71 } |
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72 |
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73 static void |
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74 op2_regbyreg(word) |
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75 unsigned word; |
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76 { |
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77 printf("%s, %s %s", regnames[word&0xF], shift_types[(word>>5)&3], |
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78 regnames[(word>>8)&0xF]); |
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79 } |
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80 |
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81 static void |
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82 op2_regshift(word) |
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83 unsigned word; |
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84 { |
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85 if (word & 0x10) |
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86 op2_regbyreg(word); |
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87 else |
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88 op2_regbyconst(word); |
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89 putchar('\n'); |
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90 } |
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91 |
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92 static void |
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93 dataproc_op2(word) |
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94 unsigned word; |
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95 { |
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96 if (word & 0x02000000) |
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97 op2_immed(word); |
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98 else |
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99 op2_regshift(word); |
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100 } |
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101 |
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102 static void |
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103 dataproc_tstcmp_overlay(word) |
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104 unsigned word; |
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105 { |
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106 char msrmask[5], *cp; |
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107 |
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108 if ((word & 0x0FFFFFF0) == 0x012FFF10) { |
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109 printf("bx%s\t%s\n", condition_decode[word>>28], |
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110 regnames[word&0xF]); |
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111 return; |
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112 } else if ((word & 0x0FBF0FFF) == 0x010F0000) { |
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113 printf("mrs%s\t%s, %cPSR\n", condition_decode[word>>28], |
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114 regnames[(word>>12)&0xF], word&0x400000 ? 'S' : 'C'); |
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115 return; |
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116 } else if ((word & 0x0DB0F000) == 0x0120F000) { |
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117 if (!(word & 0x02000000) && (word & 0xFF0)) { |
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118 printf("<invalid MSR>\n"); |
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119 return; |
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120 } |
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121 if (word & 0xF0000) { |
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122 cp = msrmask; |
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123 if (word & 0x80000) |
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124 *cp++ = 'f'; |
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125 if (word & 0x40000) |
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126 *cp++ = 's'; |
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127 if (word & 0x20000) |
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128 *cp++ = 'x'; |
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129 if (word & 0x10000) |
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130 *cp++ = 'c'; |
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131 *cp = '\0'; |
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132 } else |
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133 strcpy(msrmask, "null"); |
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134 printf("msr%s\t%cPSR_%s, ", condition_decode[word>>28], |
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135 word&0x400000 ? 'S' : 'C', msrmask); |
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136 dataproc_op2(word); |
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137 return; |
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138 } |
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139 printf("<invalid BX/MRS/MSR>\n"); |
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140 } |
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141 |
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142 static void |
90
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143 dataproc(word) |
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144 unsigned word; |
88
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145 { |
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146 unsigned opc; |
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147 |
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148 opc = (word >> 21) & 0xF; |
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149 switch (opc) { |
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150 case 0: |
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151 case 1: |
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152 case 2: |
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153 case 3: |
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154 case 4: |
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155 case 5: |
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156 case 6: |
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157 case 7: |
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158 case 0xC: |
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159 case 0xE: |
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160 printf("%s%s%s\t%s, %s, ", dataproc_ops[opc], |
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161 condition_decode[word>>28], word&0x100000 ? "s" : "", |
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162 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
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163 dataproc_op2(word); |
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164 return; |
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165 case 0xD: |
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166 case 0xF: |
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167 printf("%s%s%s\t%s, ", dataproc_ops[opc], |
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168 condition_decode[word>>28], word&0x100000 ? "s" : "", |
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169 regnames[(word>>12)&0xF]); |
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170 dataproc_op2(word); |
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171 return; |
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172 case 8: |
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173 case 9: |
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174 case 0xA: |
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175 case 0xB: |
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176 if (word & 0x100000) { |
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177 printf("%s%s\t%s, ", dataproc_ops[opc], |
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178 condition_decode[word>>28], |
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179 regnames[(word>>16)&0xF]); |
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180 dataproc_op2(word); |
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181 } else |
90
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182 dataproc_tstcmp_overlay(word); |
88
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183 return; |
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184 } |
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185 } |
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186 |
90
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187 static void |
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188 multiply(word) |
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189 unsigned word; |
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190 { |
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191 if ((word & 0x0FE000F0) == 0x90) |
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192 printf("mul%s%s\t%s, %s, %s\n", condition_decode[word>>28], |
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193 word&0x100000 ? "s" : "", regnames[(word>>16)&0xF], |
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194 regnames[word&0xF], regnames[(word>>8)&0xF]); |
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195 else if ((word & 0x0FE000F0) == 0x00200090) |
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196 printf("mla%s%s\t%s, %s, %s, %s\n", condition_decode[word>>28], |
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197 word&0x100000 ? "s" : "", regnames[(word>>16)&0xF], |
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198 regnames[word&0xF], regnames[(word>>8)&0xF], |
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199 regnames[(word>>12)&0xF]); |
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200 else if ((word & 0x0F8000F0) == 0x00800090) |
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201 printf("%c%sl%s%s\t%s, %s, %s, %s\n", |
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202 word&0x400000 ? 's' : 'u', |
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203 word&0x200000 ? "mla" : "mul", |
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204 condition_decode[word>>28], |
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205 word&0x100000 ? "s" : "", |
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206 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF], |
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207 regnames[word&0xF], regnames[(word>>8)&0xF]); |
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208 else |
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209 printf("<invalid multiply>\n"); |
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210 } |
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211 |
92
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212 static int |
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213 check_ldr_litpool(off, word, loff, size) |
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214 unsigned off, word, loff; |
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215 { |
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216 unsigned litoff, datum; |
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217 |
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218 /* base reg must be 15 */ |
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219 if (((word >> 16) & 0xF) != 15) |
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220 return(0); |
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221 /* must be a load */ |
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222 if (!(word & 0x100000)) |
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223 return(0); |
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224 /* no writeback allowed */ |
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225 if (word & 0x200000) |
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226 return(0); |
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227 /* alignment */ |
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228 if (loff & (size - 1)) |
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229 return(0); |
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230 /* range */ |
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231 off += 8; |
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232 if (word & 0x800000) |
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233 litoff = off + loff; |
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234 else { |
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235 if (loff > off) |
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236 return(0); |
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237 litoff = off - loff; |
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238 } |
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239 if (litoff >= disasm_len) |
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240 return(0); |
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241 /* all checks passed, proceed */ |
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242 switch (size) { |
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243 case 1: |
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244 datum = filemap[litoff]; |
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245 break; |
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246 case 2: |
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247 datum = get_u16(filemap + litoff); |
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248 break; |
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249 case 4: |
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250 datum = get_u32(filemap + litoff); |
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251 break; |
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252 } |
93
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253 printf("=0x%x\t; via 0x%x\n", datum, base_vma + litoff); |
92
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254 return(1); |
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255 } |
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256 |
90
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257 static void |
91
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258 ldr_str_imm_pre(off, word) |
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259 unsigned off, word; |
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260 { |
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261 unsigned loff = word & 0xFFF; |
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262 |
92
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263 printf("%s%s%s\t%s, ", word&0x100000 ? "ldr" : "str", |
91
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264 condition_decode[word>>28], word&0x400000 ? "b" : "", |
92
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265 regnames[(word>>12)&0xF]); |
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266 if (check_ldr_litpool(off, word, loff, word&0x400000 ? 1 : 4)) |
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267 return; |
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268 printf("[%s", regnames[(word>>16)&0xF]); |
91
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269 if (loff || word&0x200000) |
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270 printf(", #%s%u", word&0x800000 ? "" : "-", loff); |
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271 putchar(']'); |
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272 if (word & 0x200000) |
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273 putchar('!'); |
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274 if (loff >= 10) |
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275 printf("\t; 0x%x", loff); |
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276 putchar('\n'); |
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277 } |
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278 |
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279 static void |
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280 ldr_str_imm_post(word) |
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281 unsigned word; |
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282 { |
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283 unsigned loff = word & 0xFFF; |
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284 |
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285 printf("%s%s%s%s\t%s, [%s], #%s%u", word&0x100000 ? "ldr" : "str", |
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286 condition_decode[word>>28], word&0x400000 ? "b" : "", |
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287 word&0x200000 ? "t" : "", |
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288 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF], |
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289 word&0x800000 ? "" : "-", loff); |
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290 if (loff >= 10) |
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291 printf("\t; 0x%x", loff); |
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292 putchar('\n'); |
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293 } |
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294 |
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295 static void |
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296 ldr_str_reg_pre(word) |
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297 unsigned word; |
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298 { |
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299 if (word & 0x10) { |
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300 printf("<invalid ldr/str: offset reg shift by reg>\n"); |
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301 return; |
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302 } |
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303 printf("%s%s%s\t%s, [%s, ", word&0x100000 ? "ldr" : "str", |
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304 condition_decode[word>>28], word&0x400000 ? "b" : "", |
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305 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
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306 if (!(word & 0x800000)) |
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307 putchar('-'); |
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308 op2_regbyconst(word); |
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309 putchar(']'); |
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310 if (word & 0x200000) |
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311 putchar('!'); |
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312 putchar('\n'); |
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313 } |
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314 |
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315 static void |
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316 ldr_str_reg_post(word) |
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317 unsigned word; |
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318 { |
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319 if (word & 0x10) { |
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320 printf("<invalid ldr/str: offset reg shift by reg>\n"); |
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321 return; |
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322 } |
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323 printf("%s%s%s%s\t%s, [%s], ", word&0x100000 ? "ldr" : "str", |
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|
324 condition_decode[word>>28], word&0x400000 ? "b" : "", |
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325 word&0x200000 ? "t" : "", |
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326 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
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327 if (!(word & 0x800000)) |
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328 putchar('-'); |
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329 op2_regbyconst(word); |
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330 putchar('\n'); |
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331 } |
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332 |
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|
333 static void |
90
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|
334 ldr_str_ext(off, word) |
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|
335 unsigned off, word; |
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diff
changeset
|
336 { |
92
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
337 unsigned loff; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
338 |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
339 if (!(word&0x01000000) && word&0x200000) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
340 printf("<invalid ldrh/strh: P=0, W=1>\n"); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
341 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
342 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
343 if (!(word&0x400000) && word&0xF00) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
344 printf("<invalid ldrh/strh: SBZ!=0>\n"); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
345 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
346 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
347 printf("%s%s%s%c\t%s, ", word&0x100000 ? "ldr" : "str", |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
348 condition_decode[word>>28], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
349 word&0x40 ? "s" : "", |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
350 word&0x20 ? 'h' : 'b', |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
351 regnames[(word>>12)&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
352 if (word & 0x400000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
353 loff = ((word & 0xF00) >> 4) | (word & 0xF); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
354 switch (word & 0x01400000) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
355 case 0: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
356 /* reg post */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
357 printf("[%s], %s%s", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
358 word&0x800000 ? "" : "-", regnames[word&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
359 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
360 case 0x400000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
361 /* imm post */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
362 printf("[%s], #%s%u", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
363 word&0x800000 ? "" : "-", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
364 if (loff >= 10) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
365 printf("\t; 0x%x", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
366 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
367 case 0x01000000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
368 /* reg pre */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
369 printf("[%s, %s%s]%s", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
370 word&0x800000 ? "" : "-", regnames[word&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
371 word&0x200000 ? "!" : ""); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
372 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
373 case 0x01400000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
374 /* imm pre */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
375 if (check_ldr_litpool(off, word, loff, word&0x20 ? 2 : 1)) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
376 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
377 printf("[%s", regnames[(word>>16)&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
378 if (loff || word&0x200000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
379 printf(", #%s%u", word&0x800000 ? "" : "-", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
380 putchar(']'); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
381 if (word & 0x200000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
382 putchar('!'); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
383 if (loff >= 10) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
384 printf("\t; 0x%x", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
385 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
386 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
387 putchar('\n'); |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
388 } |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
389 |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
390 static void |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
391 dataproc_74_overlay(off, word) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
392 unsigned off, word; |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
393 { |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
394 if (word & 0x60) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
395 ldr_str_ext(off, word); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
396 else |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
397 multiply(word); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
398 } |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
399 |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
400 void |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
401 arm_disasm_line(off) |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
402 unsigned off; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
403 { |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
404 unsigned word; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
405 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
406 word = get_u32(filemap + off); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
407 printf("%8x:\t%08x\t", base_vma + off, word); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
408 if ((word >> 28) == 0xF) { |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
409 printf("<invalid-F>\n"); |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
410 return; |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
411 } |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
412 switch ((word >> 24) & 0xF) { |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
413 case 0: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
414 case 1: |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
415 if ((word & 0x90) == 0x90) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
416 dataproc_74_overlay(off, word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
417 else |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
418 dataproc(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
419 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
420 case 2: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
421 case 3: |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
422 dataproc(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
423 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
424 case 4: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
425 ldr_str_imm_post(word); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
426 return; |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
427 case 5: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
428 ldr_str_imm_pre(off, word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
429 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
430 case 6: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
431 ldr_str_reg_post(word); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
432 return; |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
433 case 7: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
434 ldr_str_reg_pre(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
435 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
436 case 8: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
437 case 9: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
438 printf("<ldm/stm>\n"); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
439 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
440 case 0xA: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
441 case 0xB: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
442 arm_branch(off, word); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
443 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
444 case 0xC: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
445 case 0xD: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
446 case 0xE: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
447 printf("<COPROCESSOR>\n"); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
448 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
449 case 0xF: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
450 printf("swi%s\t0x%x\n", condition_decode[word>>28], |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
451 word & 0xFFFFFF); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
452 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
453 } |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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454 } |
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455 |
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456 main(argc, argv) |
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457 char **argv; |
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458 { |
87
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459 unsigned off; |
86
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460 |
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461 common_init(argc, argv, 4); |
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462 for (off = 0; off < disasm_len; off += 4) |
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463 arm_disasm_line(off); |
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464 exit(0); |
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465 } |