FreeCalypso > hg > freecalypso-reveng
annotate arm7dis/armdis.c @ 106:a39a38bbec4d
analysis of what osmocon's voodoo payloads disassemble to in ARM/Thumb
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Mon, 31 Mar 2014 06:33:14 +0000 |
parents | fb5ea2758482 |
children | c883e60df239 |
rev | line source |
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1 #include <sys/types.h> |
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2 #include <stdio.h> |
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3 #include <stdlib.h> |
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4 #include <string.h> |
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5 #include <strings.h> |
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6 |
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7 extern char *binfilename; |
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8 extern u_char *filemap; |
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9 extern unsigned disasm_len, base_vma; |
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10 |
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11 extern unsigned get_u16(), get_u32(); |
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12 |
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13 extern char *regnames[16], *condition_decode[16], *shift_types[4]; |
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14 |
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15 static char *dataproc_ops[16] = {"and", "eor", "sub", "rsb", |
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16 "add", "adc", "sbc", "rsc", |
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17 "tst", "teq", "cmp", "cmn", |
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18 "orr", "mov", "bic", "mvn"}; |
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19 |
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20 static void |
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21 arm_branch(off, word) |
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22 unsigned off, word; |
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23 { |
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24 unsigned dest; |
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25 |
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26 dest = (word & 0x00FFFFFF) << 2; |
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27 if (dest & 0x02000000) |
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28 dest |= 0xFC000000; |
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29 dest += base_vma + off + 8; |
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30 printf("b%s%s\t0x%x\n", word&0x1000000 ? "l" : "", |
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31 condition_decode[word>>28], dest); |
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32 } |
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33 |
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34 static void |
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35 op2_immed(word) |
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36 unsigned word; |
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37 { |
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38 unsigned low8, rot, val; |
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39 |
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40 low8 = word & 0xFF; |
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41 rot = (word & 0xF00) >> 7; |
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42 val = (low8 << (32 - rot)) | (low8 >> rot); |
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43 if (val <= 9) |
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44 printf("#%u\n", val); |
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45 else |
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46 printf("#%u\t; 0x%x\n", val, val); |
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47 } |
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48 |
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49 static void |
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50 op2_regbyconst(word) |
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51 unsigned word; |
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52 { |
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53 unsigned c, t; |
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54 |
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55 c = (word >> 7) & 0x1F; |
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56 t = (word >> 5) & 3; |
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57 if (!c) { |
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58 switch (t) { |
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59 case 0: |
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60 printf("%s", regnames[word&0xF]); |
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61 return; |
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62 case 3: |
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63 printf("%s, rrx", regnames[word&0xF]); |
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64 return; |
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65 default: |
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66 c = 32; |
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67 } |
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68 } |
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69 printf("%s, %s #%u", regnames[word&0xF], shift_types[t], c); |
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70 } |
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71 |
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72 static void |
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73 op2_regbyreg(word) |
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74 unsigned word; |
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75 { |
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76 printf("%s, %s %s", regnames[word&0xF], shift_types[(word>>5)&3], |
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77 regnames[(word>>8)&0xF]); |
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78 } |
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79 |
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80 static void |
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81 op2_regshift(word) |
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82 unsigned word; |
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83 { |
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84 if (word & 0x10) |
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85 op2_regbyreg(word); |
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86 else |
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87 op2_regbyconst(word); |
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88 putchar('\n'); |
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89 } |
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90 |
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91 static void |
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92 dataproc_op2(word) |
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93 unsigned word; |
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94 { |
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95 if (word & 0x02000000) |
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96 op2_immed(word); |
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97 else |
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98 op2_regshift(word); |
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99 } |
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100 |
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101 static void |
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102 dataproc_tstcmp_overlay(word) |
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103 unsigned word; |
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104 { |
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105 char msrmask[5], *cp; |
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106 |
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107 if ((word & 0x0FFFFFF0) == 0x012FFF10) { |
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108 printf("bx%s\t%s\n", condition_decode[word>>28], |
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109 regnames[word&0xF]); |
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110 return; |
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111 } else if ((word & 0x0FBF0FFF) == 0x010F0000) { |
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112 printf("mrs%s\t%s, %cPSR\n", condition_decode[word>>28], |
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113 regnames[(word>>12)&0xF], word&0x400000 ? 'S' : 'C'); |
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114 return; |
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115 } else if ((word & 0x0DB0F000) == 0x0120F000) { |
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116 if (!(word & 0x02000000) && (word & 0xFF0)) { |
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117 printf("<invalid MSR>\n"); |
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118 return; |
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119 } |
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120 if (word & 0xF0000) { |
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121 cp = msrmask; |
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122 if (word & 0x80000) |
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123 *cp++ = 'f'; |
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124 if (word & 0x40000) |
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125 *cp++ = 's'; |
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126 if (word & 0x20000) |
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127 *cp++ = 'x'; |
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128 if (word & 0x10000) |
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129 *cp++ = 'c'; |
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130 *cp = '\0'; |
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131 } else |
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132 strcpy(msrmask, "null"); |
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133 printf("msr%s\t%cPSR_%s, ", condition_decode[word>>28], |
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134 word&0x400000 ? 'S' : 'C', msrmask); |
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135 dataproc_op2(word); |
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136 return; |
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137 } |
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138 printf("<invalid BX/MRS/MSR>\n"); |
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139 } |
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140 |
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141 static void |
90
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142 dataproc(word) |
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143 unsigned word; |
88
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144 { |
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145 unsigned opc; |
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146 |
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147 opc = (word >> 21) & 0xF; |
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148 switch (opc) { |
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149 case 0: |
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150 case 1: |
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151 case 2: |
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152 case 3: |
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153 case 4: |
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154 case 5: |
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155 case 6: |
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156 case 7: |
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157 case 0xC: |
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158 case 0xE: |
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159 printf("%s%s%s\t%s, %s, ", dataproc_ops[opc], |
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160 condition_decode[word>>28], word&0x100000 ? "s" : "", |
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161 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
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162 dataproc_op2(word); |
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163 return; |
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164 case 0xD: |
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165 case 0xF: |
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166 printf("%s%s%s\t%s, ", dataproc_ops[opc], |
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167 condition_decode[word>>28], word&0x100000 ? "s" : "", |
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168 regnames[(word>>12)&0xF]); |
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169 dataproc_op2(word); |
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170 return; |
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171 case 8: |
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172 case 9: |
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173 case 0xA: |
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174 case 0xB: |
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175 if (word & 0x100000) { |
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176 printf("%s%s\t%s, ", dataproc_ops[opc], |
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177 condition_decode[word>>28], |
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178 regnames[(word>>16)&0xF]); |
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179 dataproc_op2(word); |
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180 } else |
90
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181 dataproc_tstcmp_overlay(word); |
88
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182 return; |
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183 } |
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184 } |
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185 |
90
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186 static void |
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187 multiply(word) |
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188 unsigned word; |
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189 { |
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190 if ((word & 0x0FE000F0) == 0x90) |
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191 printf("mul%s%s\t%s, %s, %s\n", condition_decode[word>>28], |
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192 word&0x100000 ? "s" : "", regnames[(word>>16)&0xF], |
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193 regnames[word&0xF], regnames[(word>>8)&0xF]); |
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194 else if ((word & 0x0FE000F0) == 0x00200090) |
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195 printf("mla%s%s\t%s, %s, %s, %s\n", condition_decode[word>>28], |
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196 word&0x100000 ? "s" : "", regnames[(word>>16)&0xF], |
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197 regnames[word&0xF], regnames[(word>>8)&0xF], |
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198 regnames[(word>>12)&0xF]); |
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199 else if ((word & 0x0F8000F0) == 0x00800090) |
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200 printf("%c%sl%s%s\t%s, %s, %s, %s\n", |
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201 word&0x400000 ? 's' : 'u', |
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202 word&0x200000 ? "mla" : "mul", |
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203 condition_decode[word>>28], |
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204 word&0x100000 ? "s" : "", |
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205 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF], |
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206 regnames[word&0xF], regnames[(word>>8)&0xF]); |
95
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207 else if ((word & 0x0FB00FF0) == 0x01000090) |
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208 printf("swp%s%s\t%s, %s, [%s]\n", condition_decode[word>>28], |
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209 word&0x400000, "b", "", regnames[(word>>12)&0xF], |
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210 regnames[word&0xF], regnames[(word>>16)&0xF]); |
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211 else |
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|
212 printf("<invalid multiply>\n"); |
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213 } |
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214 |
92
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215 static int |
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216 check_ldr_litpool(off, word, loff, size) |
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217 unsigned off, word, loff; |
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218 { |
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219 unsigned litoff, datum; |
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220 |
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221 /* base reg must be 15 */ |
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222 if (((word >> 16) & 0xF) != 15) |
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223 return(0); |
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224 /* must be a load */ |
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225 if (!(word & 0x100000)) |
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226 return(0); |
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227 /* no writeback allowed */ |
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228 if (word & 0x200000) |
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229 return(0); |
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230 /* alignment */ |
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231 if (loff & (size - 1)) |
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232 return(0); |
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233 /* range */ |
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234 off += 8; |
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235 if (word & 0x800000) |
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236 litoff = off + loff; |
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237 else { |
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238 if (loff > off) |
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239 return(0); |
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240 litoff = off - loff; |
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241 } |
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242 if (litoff >= disasm_len) |
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243 return(0); |
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244 /* all checks passed, proceed */ |
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245 switch (size) { |
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246 case 1: |
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247 datum = filemap[litoff]; |
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248 break; |
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249 case 2: |
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250 datum = get_u16(filemap + litoff); |
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251 break; |
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252 case 4: |
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253 datum = get_u32(filemap + litoff); |
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254 break; |
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255 } |
93
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256 printf("=0x%x\t; via 0x%x\n", datum, base_vma + litoff); |
92
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257 return(1); |
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258 } |
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259 |
90
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260 static void |
91
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261 ldr_str_imm_pre(off, word) |
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262 unsigned off, word; |
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263 { |
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264 unsigned loff = word & 0xFFF; |
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265 |
92
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266 printf("%s%s%s\t%s, ", word&0x100000 ? "ldr" : "str", |
91
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267 condition_decode[word>>28], word&0x400000 ? "b" : "", |
92
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268 regnames[(word>>12)&0xF]); |
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269 if (check_ldr_litpool(off, word, loff, word&0x400000 ? 1 : 4)) |
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270 return; |
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271 printf("[%s", regnames[(word>>16)&0xF]); |
91
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272 if (loff || word&0x200000) |
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273 printf(", #%s%u", word&0x800000 ? "" : "-", loff); |
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274 putchar(']'); |
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275 if (word & 0x200000) |
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276 putchar('!'); |
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277 if (loff >= 10) |
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278 printf("\t; 0x%x", loff); |
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279 putchar('\n'); |
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280 } |
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281 |
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282 static void |
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283 ldr_str_imm_post(word) |
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284 unsigned word; |
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285 { |
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286 unsigned loff = word & 0xFFF; |
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287 |
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288 printf("%s%s%s%s\t%s, [%s], #%s%u", word&0x100000 ? "ldr" : "str", |
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289 condition_decode[word>>28], word&0x400000 ? "b" : "", |
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290 word&0x200000 ? "t" : "", |
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291 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF], |
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292 word&0x800000 ? "" : "-", loff); |
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293 if (loff >= 10) |
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294 printf("\t; 0x%x", loff); |
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295 putchar('\n'); |
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296 } |
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297 |
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298 static void |
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299 ldr_str_reg_pre(word) |
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300 unsigned word; |
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301 { |
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302 if (word & 0x10) { |
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303 printf("<invalid ldr/str: offset reg shift by reg>\n"); |
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304 return; |
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305 } |
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306 printf("%s%s%s\t%s, [%s, ", word&0x100000 ? "ldr" : "str", |
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307 condition_decode[word>>28], word&0x400000 ? "b" : "", |
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308 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
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309 if (!(word & 0x800000)) |
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310 putchar('-'); |
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311 op2_regbyconst(word); |
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312 putchar(']'); |
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313 if (word & 0x200000) |
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314 putchar('!'); |
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315 putchar('\n'); |
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316 } |
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317 |
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318 static void |
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319 ldr_str_reg_post(word) |
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320 unsigned word; |
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|
321 { |
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322 if (word & 0x10) { |
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|
323 printf("<invalid ldr/str: offset reg shift by reg>\n"); |
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324 return; |
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325 } |
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326 printf("%s%s%s%s\t%s, [%s], ", word&0x100000 ? "ldr" : "str", |
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327 condition_decode[word>>28], word&0x400000 ? "b" : "", |
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|
328 word&0x200000 ? "t" : "", |
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|
329 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
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330 if (!(word & 0x800000)) |
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|
331 putchar('-'); |
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|
332 op2_regbyconst(word); |
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|
333 putchar('\n'); |
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|
334 } |
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|
335 |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
336 static void |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
337 ldr_str_ext(off, word) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
338 unsigned off, word; |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
339 { |
92
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
340 unsigned loff; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
341 |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
342 if (!(word&0x01000000) && word&0x200000) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
343 printf("<invalid ldrh/strh: P=0, W=1>\n"); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
344 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
345 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
346 if (!(word&0x400000) && word&0xF00) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
347 printf("<invalid ldrh/strh: SBZ!=0>\n"); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
348 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
349 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
350 printf("%s%s%s%c\t%s, ", word&0x100000 ? "ldr" : "str", |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
351 condition_decode[word>>28], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
352 word&0x40 ? "s" : "", |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
353 word&0x20 ? 'h' : 'b', |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
354 regnames[(word>>12)&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
355 if (word & 0x400000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
356 loff = ((word & 0xF00) >> 4) | (word & 0xF); |
708f2452d1ae
armdis: full ldr/str decoding implemented
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parents:
91
diff
changeset
|
357 switch (word & 0x01400000) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
358 case 0: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
359 /* reg post */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
360 printf("[%s], %s%s", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
361 word&0x800000 ? "" : "-", regnames[word&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
362 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
363 case 0x400000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
364 /* imm post */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
365 printf("[%s], #%s%u", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
366 word&0x800000 ? "" : "-", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
367 if (loff >= 10) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
368 printf("\t; 0x%x", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
369 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
370 case 0x01000000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
371 /* reg pre */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
372 printf("[%s, %s%s]%s", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
373 word&0x800000 ? "" : "-", regnames[word&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
374 word&0x200000 ? "!" : ""); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
375 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
376 case 0x01400000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
377 /* imm pre */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
378 if (check_ldr_litpool(off, word, loff, word&0x20 ? 2 : 1)) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
379 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
380 printf("[%s", regnames[(word>>16)&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
381 if (loff || word&0x200000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
382 printf(", #%s%u", word&0x800000 ? "" : "-", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
383 putchar(']'); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
384 if (word & 0x200000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
385 putchar('!'); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
386 if (loff >= 10) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
387 printf("\t; 0x%x", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
388 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
389 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
390 putchar('\n'); |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
391 } |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
392 |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
393 static void |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
394 dataproc_74_overlay(off, word) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
395 unsigned off, word; |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
396 { |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
397 if (word & 0x60) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
398 ldr_str_ext(off, word); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
399 else |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
400 multiply(word); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
401 } |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
402 |
94
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
403 static void |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
404 ldm_stm(word) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
405 unsigned word; |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
406 { |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
407 int r, flag; |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
408 |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
409 printf("%s%s%c%c\t%s", word&0x100000 ? "ldm" : "stm", |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
410 condition_decode[word>>28], |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
411 word&0x800000 ? 'i' : 'd', word&0x01000000 ? 'b' : 'a', |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
412 regnames[(word>>16)&0xF]); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
413 if (word & 0x200000) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
414 putchar('!'); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
415 fputs(", {", stdout); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
416 flag = 0; |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
417 for (r = 0; r < 16; r++) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
418 if (word & (1 << r)) { |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
419 if (flag) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
420 fputs(", ", stdout); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
421 fputs(regnames[r], stdout); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
422 flag = 1; |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
423 } |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
424 putchar('}'); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
425 if (word & 0x400000) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
426 putchar('^'); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
427 putchar('\n'); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
428 } |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
429 |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
430 void |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
431 arm_disasm_line(off) |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
432 unsigned off; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
433 { |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
434 unsigned word; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
435 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
436 word = get_u32(filemap + off); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
437 printf("%8x:\t%08x\t", base_vma + off, word); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
438 if ((word >> 28) == 0xF) { |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
439 printf("<invalid-F>\n"); |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
440 return; |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
441 } |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
442 switch ((word >> 24) & 0xF) { |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
443 case 0: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
444 case 1: |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
445 if ((word & 0x90) == 0x90) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
446 dataproc_74_overlay(off, word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
447 else |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
448 dataproc(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
449 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
450 case 2: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
451 case 3: |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
452 dataproc(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
453 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
454 case 4: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
455 ldr_str_imm_post(word); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
456 return; |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
457 case 5: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
458 ldr_str_imm_pre(off, word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
459 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
460 case 6: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
461 ldr_str_reg_post(word); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
462 return; |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
463 case 7: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
464 ldr_str_reg_pre(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
465 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
466 case 8: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
467 case 9: |
94
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
468 ldm_stm(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
469 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
470 case 0xA: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
471 case 0xB: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
472 arm_branch(off, word); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
473 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
474 case 0xC: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
475 case 0xD: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
476 case 0xE: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
477 printf("<COPROCESSOR>\n"); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
478 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
479 case 0xF: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
480 printf("swi%s\t0x%x\n", condition_decode[word>>28], |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
481 word & 0xFFFFFF); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
482 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
483 } |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
484 } |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
485 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
486 main(argc, argv) |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
487 char **argv; |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
488 { |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
489 unsigned off; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
490 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
491 common_init(argc, argv, 4); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
492 for (off = 0; off < disasm_len; off += 4) |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
493 arm_disasm_line(off); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
494 exit(0); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
495 } |