FreeCalypso > hg > freecalypso-reveng
annotate arm7dis/armdis.c @ 308:f8344bc4fd61
dspanal: char2coff utility written, compiles
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Mon, 28 Oct 2019 05:20:50 +0000 |
parents | 27c269e408af |
children |
rev | line source |
---|---|
107
c883e60df239
arm7dis: README and header comments added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
97
diff
changeset
|
1 /* |
c883e60df239
arm7dis: README and header comments added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
97
diff
changeset
|
2 * Lean and mean ARM7TDMI disassembler |
c883e60df239
arm7dis: README and header comments added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
97
diff
changeset
|
3 * Written by Spacefalcon the Outlaw |
c883e60df239
arm7dis: README and header comments added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
97
diff
changeset
|
4 */ |
c883e60df239
arm7dis: README and header comments added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
97
diff
changeset
|
5 |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
6 #include <sys/types.h> |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
7 #include <stdio.h> |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
8 #include <stdlib.h> |
89
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
9 #include <string.h> |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
10 #include <strings.h> |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
11 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
12 extern char *binfilename; |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
13 extern u_char *filemap; |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
14 extern unsigned disasm_len, base_vma; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
15 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
16 extern unsigned get_u16(), get_u32(); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
17 |
97
fb5ea2758482
thumbdis written, compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
95
diff
changeset
|
18 extern char *regnames[16], *condition_decode[16], *shift_types[4]; |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
19 |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
20 static char *dataproc_ops[16] = {"and", "eor", "sub", "rsb", |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
21 "add", "adc", "sbc", "rsc", |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
22 "tst", "teq", "cmp", "cmn", |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
23 "orr", "mov", "bic", "mvn"}; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
24 |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
25 static void |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
26 arm_branch(off, word) |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
27 unsigned off, word; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
28 { |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
29 unsigned dest; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
30 |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
31 dest = (word & 0x00FFFFFF) << 2; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
32 if (dest & 0x02000000) |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
33 dest |= 0xFC000000; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
34 dest += base_vma + off + 8; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
35 printf("b%s%s\t0x%x\n", word&0x1000000 ? "l" : "", |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
36 condition_decode[word>>28], dest); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
37 } |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
38 |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
39 static void |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
40 op2_immed(word) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
41 unsigned word; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
42 { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
43 unsigned low8, rot, val; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
44 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
45 low8 = word & 0xFF; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
46 rot = (word & 0xF00) >> 7; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
47 val = (low8 << (32 - rot)) | (low8 >> rot); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
48 if (val <= 9) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
49 printf("#%u\n", val); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
50 else |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
51 printf("#%u\t; 0x%x\n", val, val); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
52 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
53 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
54 static void |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
55 op2_regbyconst(word) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
56 unsigned word; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
57 { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
58 unsigned c, t; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
59 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
60 c = (word >> 7) & 0x1F; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
61 t = (word >> 5) & 3; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
62 if (!c) { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
63 switch (t) { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
64 case 0: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
65 printf("%s", regnames[word&0xF]); |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
66 return; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
67 case 3: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
68 printf("%s, rrx", regnames[word&0xF]); |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
69 return; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
70 default: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
71 c = 32; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
72 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
73 } |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
74 printf("%s, %s #%u", regnames[word&0xF], shift_types[t], c); |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
75 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
76 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
77 static void |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
78 op2_regbyreg(word) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
79 unsigned word; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
80 { |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
81 printf("%s, %s %s", regnames[word&0xF], shift_types[(word>>5)&3], |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
82 regnames[(word>>8)&0xF]); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
83 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
84 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
85 static void |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
86 op2_regshift(word) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
87 unsigned word; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
88 { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
89 if (word & 0x10) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
90 op2_regbyreg(word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
91 else |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
92 op2_regbyconst(word); |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
93 putchar('\n'); |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
94 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
95 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
96 static void |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
97 dataproc_op2(word) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
98 unsigned word; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
99 { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
100 if (word & 0x02000000) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
101 op2_immed(word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
102 else |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
103 op2_regshift(word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
104 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
105 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
106 static void |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
107 dataproc_tstcmp_overlay(word) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
108 unsigned word; |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
109 { |
89
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
110 char msrmask[5], *cp; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
111 |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
112 if ((word & 0x0FFFFFF0) == 0x012FFF10) { |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
113 printf("bx%s\t%s\n", condition_decode[word>>28], |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
114 regnames[word&0xF]); |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
115 return; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
116 } else if ((word & 0x0FBF0FFF) == 0x010F0000) { |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
117 printf("mrs%s\t%s, %cPSR\n", condition_decode[word>>28], |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
118 regnames[(word>>12)&0xF], word&0x400000 ? 'S' : 'C'); |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
119 return; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
120 } else if ((word & 0x0DB0F000) == 0x0120F000) { |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
121 if (!(word & 0x02000000) && (word & 0xFF0)) { |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
122 printf("<invalid MSR>\n"); |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
123 return; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
124 } |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
125 if (word & 0xF0000) { |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
126 cp = msrmask; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
127 if (word & 0x80000) |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
128 *cp++ = 'f'; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
129 if (word & 0x40000) |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
130 *cp++ = 's'; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
131 if (word & 0x20000) |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
132 *cp++ = 'x'; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
133 if (word & 0x10000) |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
134 *cp++ = 'c'; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
135 *cp = '\0'; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
136 } else |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
137 strcpy(msrmask, "null"); |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
138 printf("msr%s\t%cPSR_%s, ", condition_decode[word>>28], |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
139 word&0x400000 ? 'S' : 'C', msrmask); |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
140 dataproc_op2(word); |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
141 return; |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
142 } |
c5d52666d2eb
armdis: BX/MRS/MSR decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
88
diff
changeset
|
143 printf("<invalid BX/MRS/MSR>\n"); |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
144 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
145 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
146 static void |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
147 dataproc(word) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
148 unsigned word; |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
149 { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
150 unsigned opc; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
151 |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
152 opc = (word >> 21) & 0xF; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
153 switch (opc) { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
154 case 0: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
155 case 1: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
156 case 2: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
157 case 3: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
158 case 4: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
159 case 5: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
160 case 6: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
161 case 7: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
162 case 0xC: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
163 case 0xE: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
164 printf("%s%s%s\t%s, %s, ", dataproc_ops[opc], |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
165 condition_decode[word>>28], word&0x100000 ? "s" : "", |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
166 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
167 dataproc_op2(word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
168 return; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
169 case 0xD: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
170 case 0xF: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
171 printf("%s%s%s\t%s, ", dataproc_ops[opc], |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
172 condition_decode[word>>28], word&0x100000 ? "s" : "", |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
173 regnames[(word>>12)&0xF]); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
174 dataproc_op2(word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
175 return; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
176 case 8: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
177 case 9: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
178 case 0xA: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
179 case 0xB: |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
180 if (word & 0x100000) { |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
181 printf("%s%s\t%s, ", dataproc_ops[opc], |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
182 condition_decode[word>>28], |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
183 regnames[(word>>16)&0xF]); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
184 dataproc_op2(word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
185 } else |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
186 dataproc_tstcmp_overlay(word); |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
187 return; |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
188 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
189 } |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
190 |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
191 static void |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
192 multiply(word) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
193 unsigned word; |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
194 { |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
195 if ((word & 0x0FE000F0) == 0x90) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
196 printf("mul%s%s\t%s, %s, %s\n", condition_decode[word>>28], |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
197 word&0x100000 ? "s" : "", regnames[(word>>16)&0xF], |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
198 regnames[word&0xF], regnames[(word>>8)&0xF]); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
199 else if ((word & 0x0FE000F0) == 0x00200090) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
200 printf("mla%s%s\t%s, %s, %s, %s\n", condition_decode[word>>28], |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
201 word&0x100000 ? "s" : "", regnames[(word>>16)&0xF], |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
202 regnames[word&0xF], regnames[(word>>8)&0xF], |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
203 regnames[(word>>12)&0xF]); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
204 else if ((word & 0x0F8000F0) == 0x00800090) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
205 printf("%c%sl%s%s\t%s, %s, %s, %s\n", |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
206 word&0x400000 ? 's' : 'u', |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
207 word&0x200000 ? "mla" : "mul", |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
208 condition_decode[word>>28], |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
209 word&0x100000 ? "s" : "", |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
210 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF], |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
211 regnames[word&0xF], regnames[(word>>8)&0xF]); |
95
9ed4d0fcb1f6
armdis: swp decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
94
diff
changeset
|
212 else if ((word & 0x0FB00FF0) == 0x01000090) |
9ed4d0fcb1f6
armdis: swp decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
94
diff
changeset
|
213 printf("swp%s%s\t%s, %s, [%s]\n", condition_decode[word>>28], |
231
27c269e408af
arm7dis/armdis: bug in the decoding of SWP instructions
Mychaela Falconia <falcon@freecalypso.org>
parents:
107
diff
changeset
|
214 word&0x400000 ? "b" : "", regnames[(word>>12)&0xF], |
95
9ed4d0fcb1f6
armdis: swp decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
94
diff
changeset
|
215 regnames[word&0xF], regnames[(word>>16)&0xF]); |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
216 else |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
217 printf("<invalid multiply>\n"); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
218 } |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
219 |
92
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
220 static int |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
221 check_ldr_litpool(off, word, loff, size) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
222 unsigned off, word, loff; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
223 { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
224 unsigned litoff, datum; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
225 |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
226 /* base reg must be 15 */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
227 if (((word >> 16) & 0xF) != 15) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
228 return(0); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
229 /* must be a load */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
230 if (!(word & 0x100000)) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
231 return(0); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
232 /* no writeback allowed */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
233 if (word & 0x200000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
234 return(0); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
235 /* alignment */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
236 if (loff & (size - 1)) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
237 return(0); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
238 /* range */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
239 off += 8; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
240 if (word & 0x800000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
241 litoff = off + loff; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
242 else { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
243 if (loff > off) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
244 return(0); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
245 litoff = off - loff; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
246 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
247 if (litoff >= disasm_len) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
248 return(0); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
249 /* all checks passed, proceed */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
250 switch (size) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
251 case 1: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
252 datum = filemap[litoff]; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
253 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
254 case 2: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
255 datum = get_u16(filemap + litoff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
256 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
257 case 4: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
258 datum = get_u32(filemap + litoff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
259 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
260 } |
93
5ebebbc74622
armdis: buglet in literal pool handling: forgot to add base_vma
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
92
diff
changeset
|
261 printf("=0x%x\t; via 0x%x\n", datum, base_vma + litoff); |
92
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
262 return(1); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
263 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
264 |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
265 static void |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
266 ldr_str_imm_pre(off, word) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
267 unsigned off, word; |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
268 { |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
269 unsigned loff = word & 0xFFF; |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
270 |
92
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
271 printf("%s%s%s\t%s, ", word&0x100000 ? "ldr" : "str", |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
272 condition_decode[word>>28], word&0x400000 ? "b" : "", |
92
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
273 regnames[(word>>12)&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
274 if (check_ldr_litpool(off, word, loff, word&0x400000 ? 1 : 4)) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
275 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
276 printf("[%s", regnames[(word>>16)&0xF]); |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
277 if (loff || word&0x200000) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
278 printf(", #%s%u", word&0x800000 ? "" : "-", loff); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
279 putchar(']'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
280 if (word & 0x200000) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
281 putchar('!'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
282 if (loff >= 10) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
283 printf("\t; 0x%x", loff); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
284 putchar('\n'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
285 } |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
286 |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
287 static void |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
288 ldr_str_imm_post(word) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
289 unsigned word; |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
290 { |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
291 unsigned loff = word & 0xFFF; |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
292 |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
293 printf("%s%s%s%s\t%s, [%s], #%s%u", word&0x100000 ? "ldr" : "str", |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
294 condition_decode[word>>28], word&0x400000 ? "b" : "", |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
295 word&0x200000 ? "t" : "", |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
296 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF], |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
297 word&0x800000 ? "" : "-", loff); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
298 if (loff >= 10) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
299 printf("\t; 0x%x", loff); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
300 putchar('\n'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
301 } |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
302 |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
303 static void |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
304 ldr_str_reg_pre(word) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
305 unsigned word; |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
306 { |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
307 if (word & 0x10) { |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
308 printf("<invalid ldr/str: offset reg shift by reg>\n"); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
309 return; |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
310 } |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
311 printf("%s%s%s\t%s, [%s, ", word&0x100000 ? "ldr" : "str", |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
312 condition_decode[word>>28], word&0x400000 ? "b" : "", |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
313 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
314 if (!(word & 0x800000)) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
315 putchar('-'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
316 op2_regbyconst(word); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
317 putchar(']'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
318 if (word & 0x200000) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
319 putchar('!'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
320 putchar('\n'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
321 } |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
322 |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
323 static void |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
324 ldr_str_reg_post(word) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
325 unsigned word; |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
326 { |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
327 if (word & 0x10) { |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
328 printf("<invalid ldr/str: offset reg shift by reg>\n"); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
329 return; |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
330 } |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
331 printf("%s%s%s%s\t%s, [%s], ", word&0x100000 ? "ldr" : "str", |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
332 condition_decode[word>>28], word&0x400000 ? "b" : "", |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
333 word&0x200000 ? "t" : "", |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
334 regnames[(word>>12)&0xF], regnames[(word>>16)&0xF]); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
335 if (!(word & 0x800000)) |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
336 putchar('-'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
337 op2_regbyconst(word); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
338 putchar('\n'); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
339 } |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
340 |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
341 static void |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
342 ldr_str_ext(off, word) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
343 unsigned off, word; |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
344 { |
92
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
345 unsigned loff; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
346 |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
347 if (!(word&0x01000000) && word&0x200000) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
348 printf("<invalid ldrh/strh: P=0, W=1>\n"); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
349 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
350 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
351 if (!(word&0x400000) && word&0xF00) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
352 printf("<invalid ldrh/strh: SBZ!=0>\n"); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
353 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
354 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
355 printf("%s%s%s%c\t%s, ", word&0x100000 ? "ldr" : "str", |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
356 condition_decode[word>>28], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
357 word&0x40 ? "s" : "", |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
358 word&0x20 ? 'h' : 'b', |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
359 regnames[(word>>12)&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
360 if (word & 0x400000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
361 loff = ((word & 0xF00) >> 4) | (word & 0xF); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
362 switch (word & 0x01400000) { |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
363 case 0: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
364 /* reg post */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
365 printf("[%s], %s%s", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
366 word&0x800000 ? "" : "-", regnames[word&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
367 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
368 case 0x400000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
369 /* imm post */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
370 printf("[%s], #%s%u", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
371 word&0x800000 ? "" : "-", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
372 if (loff >= 10) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
373 printf("\t; 0x%x", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
374 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
375 case 0x01000000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
376 /* reg pre */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
377 printf("[%s, %s%s]%s", regnames[(word>>16)&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
378 word&0x800000 ? "" : "-", regnames[word&0xF], |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
379 word&0x200000 ? "!" : ""); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
380 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
381 case 0x01400000: |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
382 /* imm pre */ |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
383 if (check_ldr_litpool(off, word, loff, word&0x20 ? 2 : 1)) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
384 return; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
385 printf("[%s", regnames[(word>>16)&0xF]); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
386 if (loff || word&0x200000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
387 printf(", #%s%u", word&0x800000 ? "" : "-", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
388 putchar(']'); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
389 if (word & 0x200000) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
390 putchar('!'); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
391 if (loff >= 10) |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
392 printf("\t; 0x%x", loff); |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
393 break; |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
394 } |
708f2452d1ae
armdis: full ldr/str decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
91
diff
changeset
|
395 putchar('\n'); |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
396 } |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
397 |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
398 static void |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
399 dataproc_74_overlay(off, word) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
400 unsigned off, word; |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
401 { |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
402 if (word & 0x60) |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
403 ldr_str_ext(off, word); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
404 else |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
405 multiply(word); |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
406 } |
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
407 |
94
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
408 static void |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
409 ldm_stm(word) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
410 unsigned word; |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
411 { |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
412 int r, flag; |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
413 |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
414 printf("%s%s%c%c\t%s", word&0x100000 ? "ldm" : "stm", |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
415 condition_decode[word>>28], |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
416 word&0x800000 ? 'i' : 'd', word&0x01000000 ? 'b' : 'a', |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
417 regnames[(word>>16)&0xF]); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
418 if (word & 0x200000) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
419 putchar('!'); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
420 fputs(", {", stdout); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
421 flag = 0; |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
422 for (r = 0; r < 16; r++) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
423 if (word & (1 << r)) { |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
424 if (flag) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
425 fputs(", ", stdout); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
426 fputs(regnames[r], stdout); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
427 flag = 1; |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
428 } |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
429 putchar('}'); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
430 if (word & 0x400000) |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
431 putchar('^'); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
432 putchar('\n'); |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
433 } |
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
434 |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
435 void |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
436 arm_disasm_line(off) |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
437 unsigned off; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
438 { |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
439 unsigned word; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
440 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
441 word = get_u32(filemap + off); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
442 printf("%8x:\t%08x\t", base_vma + off, word); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
443 if ((word >> 28) == 0xF) { |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
444 printf("<invalid-F>\n"); |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
445 return; |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
446 } |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
447 switch ((word >> 24) & 0xF) { |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
448 case 0: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
449 case 1: |
88
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
450 if ((word & 0x90) == 0x90) |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
451 dataproc_74_overlay(off, word); |
691551f0635b
armdis: implemented decoding of data processing instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
87
diff
changeset
|
452 else |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
453 dataproc(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
454 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
455 case 2: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
456 case 3: |
90
f68d8e7a904f
armdis: implemented decoding of multiplication instructions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
89
diff
changeset
|
457 dataproc(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
458 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
459 case 4: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
460 ldr_str_imm_post(word); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
461 return; |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
462 case 5: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
463 ldr_str_imm_pre(off, word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
464 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
465 case 6: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
466 ldr_str_reg_post(word); |
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
467 return; |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
468 case 7: |
91
daf69d5edb3f
armdis: ldr/str decoding implemented (but not PC-relative ldr yet)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
90
diff
changeset
|
469 ldr_str_reg_pre(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
470 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
471 case 8: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
472 case 9: |
94
915e2ca2813d
armdis: ldm/stm decoding implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
93
diff
changeset
|
473 ldm_stm(word); |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
474 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
475 case 0xA: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
476 case 0xB: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
477 arm_branch(off, word); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
478 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
479 case 0xC: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
480 case 0xD: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
481 case 0xE: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
482 printf("<COPROCESSOR>\n"); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
483 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
484 case 0xF: |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
485 printf("swi%s\t0x%x\n", condition_decode[word>>28], |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
486 word & 0xFFFFFF); |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
487 return; |
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
488 } |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
489 } |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
490 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
491 main(argc, argv) |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
492 char **argv; |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
493 { |
87
f7fba8518fa2
armdis: skeleton compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
86
diff
changeset
|
494 unsigned off; |
86
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
495 |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
496 common_init(argc, argv, 4); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
497 for (off = 0; off < disasm_len; off += 4) |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
498 arm_disasm_line(off); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
499 exit(0); |
537cf2245d98
beginning of ARM7 disassembler
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
500 } |