FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/bsp/rtc/rtc_config.h @ 590:05342cadbaf1
gsm-fw/bsp/abb+spi: abb_core_inth.c compiles with L1 enabled
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Sun, 17 Aug 2014 03:28:56 +0000 |
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1 /******************************************************************************/ |
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2 /* */ |
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3 /* File Name: rtc_config.h */ |
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4 /* */ |
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5 /* Purpose: This file contains adresses for RTC register access. */ |
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6 /* and defined value */ |
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7 /* */ |
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8 /* Note: None. */ |
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9 /* */ |
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10 /* Revision History: */ |
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11 /* 05/31/01 Laurent Sollier Create. */ |
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12 /* */ |
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13 /* (C) Copyright 2001 by Texas Instruments Incorporated, All Rights Reserved */ |
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14 /* */ |
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15 /******************************************************************************/ |
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16 |
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17 #ifndef _RTC_CONFIG_H_ |
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18 #define _RTC_CONFIG_H_ |
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19 |
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20 #include "../../include/config.h" |
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21 |
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22 #include "../mem.h" |
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23 #include "../../riviera/rv/general.h" |
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24 |
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25 |
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26 /* FOR ULYSSE AND CALYPSO CHIP */ |
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27 /* Seconds register */ |
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28 #define RTC_SECONDS_REG (UINT8 *)(RTC_XIO_START) |
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29 /* Minutes register */ |
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30 #define RTC_MINUTES_REG ((UINT8 *)(RTC_XIO_START) + 0x01) |
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31 /* Hours register */ |
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32 #define RTC_HOURS_REG ((UINT8 *)(RTC_XIO_START) + 0x02) |
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33 /* Days register */ |
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34 #define RTC_DAYS_REG ((UINT8 *)(RTC_XIO_START) + 0x03) |
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35 /* Months register */ |
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36 #define RTC_MONTHS_REG ((UINT8 *)(RTC_XIO_START) + 0x04) |
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37 /* Years register */ |
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38 #define RTC_YEARS_REG ((UINT8 *)(RTC_XIO_START) + 0x05) |
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39 /* Week register */ |
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40 #define RTC_WEEK_REG ((UINT8 *)(RTC_XIO_START) + 0x06) |
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41 /* Alarms seconds register */ |
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42 #define RTC_ALARM_SECONDS_REG ((UINT8 *)(RTC_XIO_START) + 0x08) |
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43 /* Alarms minutes register */ |
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44 #define RTC_ALARM_MINUTES_REG ((UINT8 *)(RTC_XIO_START) + 0x09) |
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45 /* Alarms hours register */ |
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46 #define RTC_ALARM_HOURS_REG ((UINT8 *)(RTC_XIO_START) + 0x0A) |
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47 /* Alarms days register */ |
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48 #define RTC_ALARM_DAYS_REG ((UINT8 *)(RTC_XIO_START) + 0x0B) |
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49 /* Alarms months register */ |
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50 #define RTC_ALARM_MONTHS_REG ((UINT8 *)(RTC_XIO_START) + 0x0C) |
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51 /* Alarms years register */ |
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52 #define RTC_ALARM_YEARS_REG ((UINT8 *)(RTC_XIO_START) + 0x0D) |
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53 /* Control register */ |
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54 #define RTC_CTRL_REG ((UINT8 *)(RTC_XIO_START) + 0x10) |
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55 /* Status register */ |
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56 #define RTC_STATUS_REG ((UINT8 *)(RTC_XIO_START) + 0x11) |
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57 /* Interrupts register */ |
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58 #define RTC_INTERRUPTS_REG ((UINT8 *)(RTC_XIO_START) + 0x12) |
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59 /* LSB compensation register */ |
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60 #define RTC_COMP_LSB_REG ((UINT8 *)(RTC_XIO_START) + 0x13) |
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61 /* MSB compensation register */ |
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62 #define RTC_COMP_MSB_REG ((UINT8 *)(RTC_XIO_START) + 0x14) |
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63 |
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64 /* RTC Control register description */ |
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65 |
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66 #define RTC_START_RTC 0x0001 /* 1 => RTC is running */ |
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67 #define RTC_ROUND_30S 0x0002 /* Time rounded to the closest minute */ |
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68 #define RTC_AUTO_COMP 0x0004 /* Auto compensation enabled or not */ |
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69 #define RTC_MODE_12_24 0x0008 /* 12 hours mode*/ |
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70 #define RTC_TEST_MODE 0x0010 /* Test mode */ |
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71 #define RTC_SET_32_COUNTER 0x0020 /* set 32 KHz counter with comp_reg */ |
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72 #if ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) |
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73 #define RTC_nDELTA_OMEGA 0x0040 /* Analog Baseband Type */ |
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74 #endif |
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75 |
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76 |
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77 /* RTC Interrupt register description */ |
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78 |
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79 #define RTC_EVERY 0x0003 |
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80 /* Define period of periodic interrupt (second, minute, hour, day) */ |
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81 #define RTC_IT_TIMER 0x0004 /* Enable periodic interrupt */ |
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82 #define RTC_IT_ALARM 0x0008 /* Alarm interrupt enabled or not */ |
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83 |
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84 /* RTC Status register description */ |
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85 |
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86 #define RTC_BUSY 0x0001 |
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87 #define RTC_RUN 0x0002 /* RTC is running */ |
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88 #define RTC_1S_EVENT 0x0004 /* One second has occured */ |
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89 #define RTC_1M_EVENT 0x0008 /* One minute has occured */ |
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90 #define RTC_1H_EVENT 0x0010 /* One hour has occured */ |
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91 #define RTC_1D_EVENT 0x0020 /* One day has occrued */ |
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92 #define RTC_ALARM 0x0040 /* Alarm interrupt has been generated */ |
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93 #define RTC_POWER_UP 0x0080 /* Indicates that a reset occured */ |
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94 |
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95 #define RTC_EVERY_SEC 0x0000 |
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96 #define RTC_EVERY_MIN 0x0001 |
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97 #define RTC_EVERY_HR 0x0002 |
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98 #define RTC_EVERY_DAY 0x0003 |
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99 |
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100 /* 32 Khz and HF clock definition */ |
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101 #define RTC_CLOCK_32K 32768.0 |
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102 |
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103 /* HF clock definition */ |
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104 #if ((CHIPSET == 3) || (CHIPSET == 5) || (CHIPSET == 6)) |
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105 #define RTC_CLOCK_HF 65000000.0 |
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106 #elif ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8)) |
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107 #define RTC_CLOCK_HF 78000000.0 |
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108 #elif ((CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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109 #define RTC_CLOCK_HF 104000000.0 |
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110 #endif |
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111 |
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112 |
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113 |
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114 #endif /* #ifndef _RTC_CONFIG_H_ */ |