annotate gsm-fw/L1/include/l1_confg.h @ 530:25a7fe25864c

gsm-fw/L1/include: switch to LoCosto versions of all header files
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Fri, 01 Aug 2014 16:38:35 +0000
parents 80ee7eacdaeb
children de635895e0be
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_CONFG.H
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4 *
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5 * Filename l1_confg.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9
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10 #ifndef __L1_CONFG_H__
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11 #define __L1_CONFG_H__
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12
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13 #ifndef _WINDOWS
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14 #include "l1sw.cfg" // Configuration Software
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15 #include "board.cfg"
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16 #include "chipset.cfg"
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17 #include "rf.cfg"
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18 #include "swconfig.cfg"
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19 #include "sys.cfg"
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20 #endif
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21
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22 // Traces...
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23 // TRACE_TYPE == 1,2,3 are used in standalone mode (L2-L3 Simul) with USART
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24 // TRACE_TYPE == 4 is used on A-sample only (with UART): L1 + protocol stack
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25 // TRACE_TYPE == 1 -> L1/L3 interface trace
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26 // TRACE_TYPE == 2 -> Trace mode: ~33~~1~011...
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27 // TRACE_TYPE == 3 -> same as above (2) plus FER or stats trace
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28 // TRACE_TYPE == 4 -> L1/L3 interface trace on A-sample with protocol stack
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29 // TRACE_TYPE == 5 -> trace for full simulation
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30 // TRACE_TYPE == 6 -> CPU load trace for hisr
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31 // TRACE_TYPE == 7 -> CPU LOAD trace for layer 1 hisr for all TDMA. Output on
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32 // UART at 38400 bps =>
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33 // format : <hisr cpu value in microseconds> <frame number>
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34
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35 // Code PB reported workaround
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36 //------------------------------
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37
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38
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39 // Code Version possible choices
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40 //------------------------------
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41 #define SIMULATION 1
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42 #define NOT_SIMULATION 2
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43
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44 // RLC functions Version possible choices
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45 //------------------------------
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46 #define POLL_FORCED 0
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47 #define RLC_SCENARIO 1
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48 #define MODEM_FLOW 2
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49
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50 // possible choices for UART trace output
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51 //------------------------------
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52 #if (CHIPSET != 15)
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53 #define MODEM_UART 0
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54 #define IRDA_UART 1
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55 #if (CHIPSET == 12)
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56 #define MODEM2_UART 2
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57 #endif
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58 #else
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59 // There is only one UART in Locosto
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60 #define MODEM_UART 0
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61 #endif
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62
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63 //============
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64 // CODE CHOICE
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65 //============
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66 #if (OP_L1_STANDALONE==0)
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67 #define CODE_VERSION NOT_SIMULATION
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68 #else // OP_L1_STANDALONE
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69 #ifdef WIN32
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70 #define CODE_VERSION SIMULATION
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71 #else // WIN32
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72 #define CODE_VERSION NOT_SIMULATION
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73 #endif // WIN32
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74 #endif // OP_L1_STANDALONE
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75 //---------------------------------------------------------------------------------
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76 // Test with full simulation.
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77 //---------------------------------------------------------------------------------
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78 #if (CODE_VERSION == SIMULATION)
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79
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80
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81 #undef FF_L1_IT_DSP_USF
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82 #define FF_L1_IT_DSP_USF 0
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83 #undef FF_L1_IT_DSP_DTX
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84 #if (AMR == 1)
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85 #define FF_L1_IT_DSP_DTX 1 //it should be 1, sajal- temp made it 0 for build purpose
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86 #else
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87 #define FF_L1_IT_DSP_DTX 0
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88 #endif
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89
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90 #define L1_DRP_IQ_SCALING 0
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91
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92 // Test Scenari...
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93 #define SCENARIO_FILE 1 // Test Scenario comes from input files.
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94 #define SCENARIO_MEM 0 // Test Scenario comes from RAM.
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95
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96 // In Simulation AUDIO_DEBUG Should be 0
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97 #define AUDIO_DEBUG 0
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98
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99 // Traces...
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100 #undef TRACE_TYPE
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101 #define TRACE_TYPE 5
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102 #define LOGFILE_TRACE 1 // trace in an output logfile
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103
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104 #define BURST_PARAM_LOG_ENABLE 0 // Burst Param Log Enable
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105
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106 #define FLOWCHART 0 // Message sequence/flow chart trace.
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107 #define NUCLEUS_TRACE 0 // Nucleus error trace
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108 #define EOTD_TRACE 1 // EOTD log trace
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109 #define TRACE_FULL_NAME 0 // display full fct names after a PM/COM error
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110
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111 #define L2_L3_SIMUL 1 // Layer 2 & Layer 3 simulated, main within NU_MAIN.C, trace possible.
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112
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113 // Control algorithms...
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114 #define AFC_ALGO 1 // AFC algorithm.
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115 #if (L1_SAIC != 0)
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116 #define TOA_ALGO 2 // TOA algorithm.
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117 #else
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118 #define TOA_ALGO 1 // TOA algorithm.
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119 #endif
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120 #define AGC_ALGO 1 // AGC algorithm.
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121 #define TA_ALGO 0 // TA (Timing Advance) algorithm.
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122 #undef VCXO_ALGO
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123 #define VCXO_ALGO 1 // VCXO algo
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124 #undef DCO_ALGO
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125 #define DCO_ALGO 0 // DCO algo (TIDE)
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126 #undef ORDER2_TX_TEMP_CAL
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127 #define ORDER2_TX_TEMP_CAL 0 // TX Temperature Compensation Algorithm selection
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128
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129
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130 #define FACCH_TEST 0 // FACCH test enabled.
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131
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132 #define ADC_TIMER_ON 0 // Timer for ADC measurements
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133 #define AFC_ON 1 // Enable of the Omega AFC module
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134
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135 #define AUDIO_TASK 1 // Enable the L1 audio features
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136 #define AUDIO_SIMULATION 1 // Audio simulator for the audio tasks (works only with the new audio design i.e. AUDIO_TASK=1)
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137 #define AUDIO_L1_STANDALONE 0 // Flag to enable the audio simulator used with the L1 stand-alone (works only with the new audio design i.e. AUDIO_TASK=1)
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138
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139 #define GTT_SIMULATION 1 // Gtt simulator for the gtt tasks (works only with if L1_GTT=1)
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140 #define TTY_SYNC_MCU 0 // TTY WORKAROUND BUG03401
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141 #define TTY_SYNC_MCU_2 0 //
115
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142 #define L1_GTT_FIFO_TEST_ATOMIC 0 //
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143 #define NEW_WKA_PATCH 0
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144 #define OPTIMISED 0
115
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145
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146 #define L1_RECOVERY 0 // L1 recovery
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147
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148 #undef L1_GPRS
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149 #define L1_GPRS 1 // GPRS L1: MS supporting both Circuit Switched and Packet (GPRS) capabilities
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150
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151 #undef AMR
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152 #define AMR 1 // AMR version 1.0 supported
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153
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154 #undef L1_12NEIGH
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155 #define L1_12NEIGH 1 // new L1-RR interface for 12 neighbour cells
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156
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157 #undef L1_GTT
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158 #define L1_GTT 1 // Enable Global Text Telephony feature for simulation
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159
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160 #undef OP_L1_STANDALONE
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161 #define OP_L1_STANDALONE 1 // Selection of code for L1 stand alone
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162
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163 #undef OP_RIV_AUDIO
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164 #define OP_RIV_AUDIO 0 // Selection of code for Riviera audio
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165
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166 #undef OP_WCP
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167 #define OP_WCP 0 // No WCP integration
530
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168
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169 #undef L1_DRP
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170 #define L1_DRP 0 // L1 supporting DRP interface
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171
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172 #undef DRP_MEM_SIMULATION
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173 #define DRP_MEM_SIMULATION 0
115
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174 //---------------------------------------------------------------------------------
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175 // Test with H/W platform.
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176 //---------------------------------------------------------------------------------
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177
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178 #if (GSM_IDLE_RAM == 1)
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179 #define GSM_IDLE_RAM_DEBUG 0
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180 #endif
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181
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182 #define AFC_BYPASS_MODE 0
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183 #define PWMEAS_IF_MODE_FORCE 0
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184 // WA for OMAPS00099442 must be disabled in PC simulation
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185 #undef L1_FF_WA_OMAPS00099442
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186 #define L1_FF_WA_OMAPS00099442 0
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187
115
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188 #elif (CODE_VERSION == NOT_SIMULATION)
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189
530
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190 #define L1_DRP_IQ_SCALING 1
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191 // In Target AUDIO_DEBUG could be turned ON to debug any AUDIO ON/OFF issues
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192 #define AUDIO_DEBUG 0
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193
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194 #if (GSM_IDLE_RAM == 1)
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195 #if ((CHIPSET == 12) || (CHIPSET == 10))
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196 #define GSM_IDLE_RAM_DEBUG 1
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197 #else
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198 #define GSM_IDLE_RAM_DEBUG 0
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199 #endif
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diff changeset
200 #else
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diff changeset
201 #define GSM_IDLE_RAM_DEBUG 0
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202 #endif
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203
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204 #define L1_VPM 1
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diff changeset
205 #if (OP_L1_STANDALONE == 1)
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diff changeset
206 #if (CHIPSET == 15)
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diff changeset
207 #if ((BOARD == 71) && (FLASH == 0))
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diff changeset
208 // Not possible in I-SAMPLE only RAM configuration as there will
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diff changeset
209 // not be enough memory space
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diff changeset
210 #define BURST_PARAM_LOG_ENABLE 0
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diff changeset
211 #else
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diff changeset
212 #define BURST_PARAM_LOG_ENABLE 1
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diff changeset
213 #endif
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diff changeset
214 #else
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diff changeset
215 #define BURST_PARAM_LOG_ENABLE 0
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diff changeset
216 #endif
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diff changeset
217 #else
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diff changeset
218 #define BURST_PARAM_LOG_ENABLE 0
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diff changeset
219 #endif
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220
115
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221 // Work around about Calypso RevA: the bus is floating (Cf PB01435)
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222 // (corrected with Calypso ReV B and Calypso C035)
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diff changeset
223 #if (CHIPSET == 7)
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diff changeset
224 #define W_A_CALYPSO_BUG_01435 1
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diff changeset
225 #else
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226 #define W_A_CALYPSO_BUG_01435 0
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diff changeset
227 #endif
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228
530
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diff changeset
229 #if (CHIPSET == 12) // Not needed for CHIPSET =15, as there is no extended page mode in Locosto
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diff changeset
230 #define W_A_CALYPSO_PLUS_SPR_19599 1
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diff changeset
231 #else
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diff changeset
232 #define W_A_CALYPSO_PLUS_SPR_19599 0
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diff changeset
233 #endif
115
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234
1e41550feec5 nuc-fw: Init_Target() reconstructed
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235 // for AMR thresolds definition CQ22226
530
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diff changeset
236 #define W_A_AMR_THRESHOLDS 1
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diff changeset
237 #define W_A_PCTM_RX_AGC_GLOBAL_PARAMS 1 // For support of PCTM
115
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238
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
239 #if (L1_GTT==1)
530
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diff changeset
240 #define TTY_SYNC_MCU 0
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diff changeset
241 #define TTY_SYNC_MCU_2 0
115
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242 #define L1_GTT_FIFO_TEST_ATOMIC 0
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243 #define NEW_WKA_PATCH 0
530
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diff changeset
244 #define OPTIMISED 0
115
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diff changeset
245 #else
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diff changeset
246 #define TTY_SYNC_MCU_2 0
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247 #define L1_GTT_FIFO_TEST_ATOMIC 0
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248 #define TTY_SYNC_MCU 0
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diff changeset
249 #define NEW_WKA_PATCH 0
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diff changeset
250 #define OPTIMISED 0
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251
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252 #endif
530
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diff changeset
253
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diff changeset
254 #undef FF_L1_IT_DSP_USF
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diff changeset
255 #if (L1_GPRS == 1)
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diff changeset
256 #define FF_L1_IT_DSP_USF 1
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diff changeset
257 #else
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diff changeset
258 #define FF_L1_IT_DSP_USF 0
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diff changeset
259 #endif
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diff changeset
260 #undef FF_L1_IT_DSP_DTX
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diff changeset
261 #if (AMR == 1)
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diff changeset
262 #define FF_L1_IT_DSP_DTX 1
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diff changeset
263 #else
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diff changeset
264 #define FF_L1_IT_DSP_DTX 0
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diff changeset
265 #endif
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diff changeset
266
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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267 // Traces...
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
268 #define NUCLEUS_TRACE 0 // Nucleus error trace
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
269 #define FLOWCHART 0 // Message sequence/flow chart trace.
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270 #define LOGFILE_TRACE 0 // trace in an output logfile
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diff changeset
271 #define TRACE_FULL_NAME 0 // display full fct names after a PM/COM error
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272
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273 // Test Scenari...
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diff changeset
274 #define SCENARIO_FILE 0 // Test Scenario comes from input files.
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diff changeset
275 #define SCENARIO_MEM 1 // // Test Scenario comes from RAM.
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diff changeset
276
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
277 #if (OP_L1_STANDALONE == 1)
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diff changeset
278 #define L2_L3_SIMUL 1 // Layer 2 & Layer 3 simulated, main within NU_MAIN.C, trace possible.
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diff changeset
279 #else
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280 #define L2_L3_SIMUL 0
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281 #endif
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282
1e41550feec5 nuc-fw: Init_Target() reconstructed
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283 // Control algorithms...
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
284 #define AFC_ALGO 1 // AFC algorithm.
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diff changeset
285 //TOA Algorithm needs to be on for TestMode, otherwise no dedic test will be succesful!!!
530
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diff changeset
286 #if (L1_SAIC != 0)
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diff changeset
287 #define TOA_ALGO 2 // TOA algorithm.
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diff changeset
288 #else
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
289 #define TOA_ALGO 1 // TOA algorithm.
530
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diff changeset
290 #endif
115
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diff changeset
291 #define AGC_ALGO 1 // AGC algorithm.
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diff changeset
292 #define TA_ALGO 1 // TA (Timing Advance) algorithm.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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diff changeset
293
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
294 #define FACCH_TEST 0 // FACCH test enabled.
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diff changeset
295
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
296 #define ADC_TIMER_ON 0 // Timer for ADC measurements
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diff changeset
297 #define AFC_ON 1 // Enable of the Omega AFC module
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diff changeset
298
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
299 #define AUDIO_TASK 1 // Enable the L1 audio features
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diff changeset
300 #define AUDIO_SIMULATION 0 // Audio simulator for the audio tasks (works only with the new audio design i.e. AUDIO_TASK=1)
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diff changeset
301 #if (OP_L1_STANDALONE == 1)
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diff changeset
302 #define AUDIO_L1_STANDALONE 1 // Flag to enable the audio simulator used with the L1 stand-alone (works only with the new audio design i.e. AUDIO_TASK=1)
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diff changeset
303 #else
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diff changeset
304 #define AUDIO_L1_STANDALONE 0
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parents:
diff changeset
305 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
306
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
307 #define GTT_SIMULATION 0 // Gtt simulator for the gtt tasks (works only with if L1_GTT=1)
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diff changeset
308
530
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diff changeset
309 #define OP_BT 0 // Simulation of ISLAND (BLUETOOTH) sleep management
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
310
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
311 #define L1_RECOVERY 1 // L1 recovery
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diff changeset
312
530
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diff changeset
313 #if ((RF_FAM == 60) || (RF_FAM == 61))
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diff changeset
314 #define L1_DRP 1 // L1 supporting DRP interface
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diff changeset
315 #else
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diff changeset
316 #define L1_DRP 0 // L1 supporting DRP interface
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diff changeset
317 #endif
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diff changeset
318 #define DRP_MEM_SIMULATION 0 // DRP memory simulation OFF by default
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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parents:
diff changeset
319
1e41550feec5 nuc-fw: Init_Target() reconstructed
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diff changeset
320 #if (L1_GPRS == 1)
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diff changeset
321 #define RLC_VERSION RLC_SCENARIO
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parents:
diff changeset
322 #if (RLC_VERSION == RLC_SCENARIO)
1e41550feec5 nuc-fw: Init_Target() reconstructed
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parents:
diff changeset
323 #define RLC_DL_BLOCK_STAT 0 // Works with RLC_VERSION = RLC_SCENARIO
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parents:
diff changeset
324 // output stat on CRC error blocks
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
325 // The user must enter the cs type and
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
326 // the number of frames desired.
1e41550feec5 nuc-fw: Init_Target() reconstructed
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parents:
diff changeset
327 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
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parents:
diff changeset
328 #define RLC_DL_BLOCK_STAT 0 // Default value; Never change it
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
329 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
330
1e41550feec5 nuc-fw: Init_Target() reconstructed
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parents:
diff changeset
331 #if (OP_L1_STANDALONE == 1)
1e41550feec5 nuc-fw: Init_Target() reconstructed
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parents:
diff changeset
332 #define DSP_BACKGROUND_TASKS 1 // Enable the TEST of DSP background.tasks
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
333 // activated by a layer 3 message (BG_TASK_START (<task number>))
1e41550feec5 nuc-fw: Init_Target() reconstructed
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parents:
diff changeset
334 // deactivated by a layer 3 message (BG_TASK_STOP (<task number>))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
335 // Warning : Works only with DSP>=31
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
336 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
337 #define DSP_BACKGROUND_TASKS 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
338 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
339
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
340 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
341 #define DSP_BACKGROUND_TASKS 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
342 #define RLC_DL_BLOCK_STAT 0 // Default value; Never change it
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
343 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
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parents: 526
diff changeset
344 #define PWMEAS_IF_MODE_FORCE 1
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parents: 526
diff changeset
345 // WA for OMAPS00099442 (OMAPS0010023 (N12.x), OMAPS000010022 (N5.x))
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parents: 526
diff changeset
346 // The problem is: When NW is lost due to reception gap or cell border range,
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parents: 526
diff changeset
347 // the MS will try to re-synchronize on the cell with the TPU timing aligned
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parents: 526
diff changeset
348 // with the timing of the cell. So the FB will start within the 92 bits of the TPU window and
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parents: 526
diff changeset
349 // will be missed. This issue is due to a limitation of the legacy FB demodulation algorithm
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parents: 526
diff changeset
350 // WA is to re-initialize the TPU with an arbitrary timing value
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parents: 526
diff changeset
351 #undef L1_FF_WA_OMAPS00099442
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parents: 526
diff changeset
352 #define L1_FF_WA_OMAPS00099442 1
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parents: 526
diff changeset
353
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
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parents:
diff changeset
354 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
355
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
356 // Audio tasks selection
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
357 //-----------------------
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
358
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
359 #if (AUDIO_TASK == 1)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
360 #define KEYBEEP 1 // Enable keybeep feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
361 #define TONE 1 // Enable tone feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
362 // Temporary modification for protocol stack compatibility - GSMLITE will be removed
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
363 #if (OP_L1_STANDALONE == 1)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
364 #define GSMLITE 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
365 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
366 #if (CODE_VERSION == SIMULATION)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
367 #define L1_VOICE_MEMO 1
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
368 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
369 #if ((OP_L1_STANDALONE == 1) || (!GSMLITE))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
370 #define MELODY_E1 1 // Enable melody format E1 feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
371
530
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
372 #if(L1_VOICE_MEMO == 1)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
373 #define VOICE_MEMO 1 // Enable voice memorization feature
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
374 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
375 #define VOICE_MEMO 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
376 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
377 #define FIR 1 // Enable FIR feature
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
378 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
379 #define AUDIO_MODE 1 // Enable Audio mode feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
380 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
381 #define AUDIO_MODE 0 // Disable Audio mode feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
382 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
383 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
384 #define MELODY_E1 0 // Disable melody format E1 feature
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
385 #if(L1_VOICE_MEMO == 1)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
386 #define VOICE_MEMO 1 // Enable voice memorization feature
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
387 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
388 #define VOICE_MEMO 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
389 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
390 #if (MELODY_E2)
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
391 #define FIR 1 // Enable FIR feature
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
392 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
393 #define FIR 0 // Disable FIR feature
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
394 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
395 #define AUDIO_MODE 0 // Disable Audio mode feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
396 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
397
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
398
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
399 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
400 #define KEYBEEP 0 // Enable keybeep feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
401 #define TONE 0 // Enable tone feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
402 #define MELODY_E1 0 // Enable melody format E1 feature
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
403 #define VOICE_MEMO 0 // Enable voice memorization feature
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
404 #define FIR 0 // Enable FIR feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
405 #define AUDIO_MODE 0 // Enable Audio mode feature
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
406 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
407 #define L1_MIDI_BUFFER 1
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
408
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
409 #define L1_AUDIO_BACKGROUND_TASK (SPEECH_RECO | MELODY_E2) // audio background task is used by speech reco and melody_e2
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
410 #if (OP_RIV_AUDIO == 1)
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
411 #define L1_AUDIO_DRIVER (L1_VOICE_MEMO_AMR | L1_EXT_AUDIO_MGT | L1_MP3) // Riviera audio driver (only Voice Memo AMR is available)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
412 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
414
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
415 // Vocoder selections
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
416 //-------------------
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 #define FR 1 // Full Rate
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
419 #define FR_HR 2 // Full Rate + Half Rate
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
420 #define FR_EFR 3 // Full Rate + Enhanced Full Rate
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
421 #define FR_HR_EFR 4 // Full Rate + Half Rate + Enhanced Full Rate
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
422
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
423 // Standard (frequency plan) selections
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 //-------------------------------------
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
425 #if(L1_FF_MULTIBAND == 0) // std id is not used if multiband feature is enabled
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
426
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
427 #define GSM 1 // GSM900.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
428 #define GSM_E 2 // GSM900 Extended.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429 #define PCS1900 3 // PCS1900.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 #define DCS1800 4 // DCS1800.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
431 #define DUAL 5 // Dual Band (GSM900 + DCS 1800 bands)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432 #define DUALEXT 6 // Dual Band (E-GSM900 + DCS 1800 bands)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433 #define GSM850 7 // GSM850 Band
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
434 #define DUAL_US 8 // PCS1900 + GSM850
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
435
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
436 #endif // L1_FF_MULTIBAND
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
437
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
438 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439 /* Power Management */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
440 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
441 #define PWR_MNGT 1 // POWER management active if l1_config.pwr_mngt=1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
442
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
443 /*------------------------------------*/
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
444 /* BT Audio */
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
445 /*------------------------------------*/
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
446 #if ((L1_MP3 == 1) || (L1_AAC == 1))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
447 #if (OP_L1_STANDALONE == 0)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
448 #if((PSP_STANDALONE == 1) || (DRP_FW_BUILD == 1))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
449 #define L1_BT_AUDIO 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
450 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
451 #define L1_BT_AUDIO 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
452 #endif
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
453 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
454 #define L1_BT_AUDIO 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
455 #endif
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
456 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
457 /*---------------------------------------------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
458 /* DSP configurations */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
459 /* ------------------ */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
460 /* DSP | FR| HR|EFR|14.4| SPEED |12LA68|12LA68 |4L32|AEC| MCU/DSP */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
461 /* (version) | | | | | |POLE80|POLE112| |/NS| interface */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
462 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
463 /* 0 (821) | x | | | | 39Mhz | x | | | | 1 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
464 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
465 /* 1 (830) | x | | | | 39Mhz | (1) | | x | | 1 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
466 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
467 /* 2 (912) | x | x | | | 58.5Mhz | x | | | | 2 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
468 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
469 /* 3 (10xx) | x | | x | x | 65Mhz | x | | | x | 3 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
470 /* ----------+---+---+---+----+---------+------+-------+----|---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
471 /* 4 (11xx) | x | x | x | x | 65Mhz | x | x (3)| | x | 3 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
472 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
473 /* 5 (830) | x | | | | 39Mhz | x | | | | 1 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
474 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
475 /* 6 (11xx) | x | x | x | x | 65Mhz | x | x (3)| |(2)| 3 */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
476 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
477 /* */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
478 /*(1) this version can be loaded on a 12LA68/POLE80 but the RIF/DL problem is*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
479 /* not corrected. */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
480 /* */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
481 /*(2) AEC is disabled at DSP level but L1 must be compiled with MCU/DSP */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
482 /* interface which support AEC, therefore AEC is defined as 1. */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
483 /* */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
484 /*(3) Pole112 include RIF DL correction. No patch is needed if this one only */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
485 /* include RIF/DL problem. */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
486 /* */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
487 /*---------------------------------------------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
488 #if (DSP == 16 || DSP == 17)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
489
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
490 /* #define CLKMOD1 0x414e // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
491 #define CLKMOD2 0x414e // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
492 #define CLKSTART 0x29 // ...65 Mips */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
493
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
494 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
495 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
496 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
497
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
498 /* #define CLKMOD1 0x2116 //This settings force the DSP to never enteridle
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
499 #define CLKMOD2 0x2116 //In this case the PLL will be always on. 39 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
500 #define CLKSTART 0x25 // ...39 Mips */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
501
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
502 #define VOC FR_HR_EFR // FR + HR + EFR.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
503 #define DATA14_4 1 // No 14.4 data allowed.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
504 #define AEC 1 // AEC/NS supported.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
505 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
506 #define DSP_START 0x2000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
507 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
508
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
509 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
510
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
511 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
512 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
513 #if (MELODY_E2)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
514 // In case of the melody E2 the DSP trace must be disable because the
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
515 // melody instrument waves are overlayed with DSP trace buffer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
516
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
517 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
518 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
519 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
520 #else
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
521 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
522 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
523 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
524 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
525
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
526 #elif (DSP == 30) // First GPRS.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
527 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
528 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
529 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
530
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
531 #define VOC FR_HR_EFR // FR + HR + EFR.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
532 #define DATA14_4 1 // No 14.4 data allowed.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
533 #define AEC 1 // AEC/NS not supported.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
534 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
535 #define DSP_START 0x1F81
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
536 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
537 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
538
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
539 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
540 #elif (DSP == 31) // ROM Code GPRS G0.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
541 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
542 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
543 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
544
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
545 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
546 #define DATA14_4 1 // 14.4 data allowed.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
547 #define AEC 1 // AEC/NS not supported.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
548 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
549
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
550 #define DSP_START 0x8763
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
551
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
552 #define INSTALL_ADD 0x87c9 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
553 #define INSTALL_ADD_WITH_PATCH 0x1352 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
554
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
555 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
556 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
557
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
558 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
559 #elif (DSP == 32) // ROM Code GPRS G1.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
560 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
561 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
562 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
563
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
564 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
565 #define DATA14_4 1 // 14.4 data allowed.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
566 #define AEC 1 // AEC/NS not supported.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
567 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
568
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
569 #define DSP_START 0x8763
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
570
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
571 #define INSTALL_ADD 0x87c9 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
572
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
573 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
574 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
575
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
576 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
577 #elif (DSP == 33) // ROM Code GPRS.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
578 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
579 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
580 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
581 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
582 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
583 #define AEC 1 // AEC/NS not supported.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
584 #define L1_NEW_AEC 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
585
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
586 #if ((L1_NEW_AEC) && (!AEC))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
587 // First undef the flag to avoid warnings at compilation time
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
588 #undef AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
589 #define AEC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
590 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
591
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
592 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
593
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
594 #define DSP_START 0x7000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
595
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
596 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
597
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
598 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
599 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
600
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
601 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
602
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
603 #if (CODE_VERSION == NOT_SIMULATION)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
604 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
605 // management.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
606 // DSP_IDLE3 is not supported in simulation
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
607 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
608 #define W_A_DSP_IDLE3 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
609 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
610
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
611 // DSP software work-around config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
612 // bit0 - Work-around to support CRTG.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
613 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
614 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
615 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
616
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
617 #if (ANLG_FAM == 1) // OMEGA / NAUSICA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
618 #define C_DSP_SW_WORK_AROUND 0x0006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
619
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
620 #elif (ANLG_FAM == 2) // IOTA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
621 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
622
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
623 #elif (ANLG_FAM == 3) // SYREN
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
624 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
625
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
626 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
627
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
628 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
629 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
630 #if (MELODY_E2)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
631 // In case of the melody E2 the DSP trace must be disable because the
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
632 // melody instrument waves are overlayed with DSP trace buffer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
633
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
634 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
635 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
636 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
637
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
638 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
639 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
640 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
641 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
642
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
643 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
644 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
645 // Currently not supported !
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
646 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
647 #else
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
648 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
649 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
650 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
651
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
652 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
653 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
654 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
655 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Buffer Header.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
656
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
657 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
658 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
659 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
660 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
661 /* d_error_status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
662 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
663
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
664 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
665 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
666
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
667 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
668 #define DSP_DEBUG_GSM_MASK 0x08BD // L1_MCU-SPR-15852
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
669 #define DSP_DEBUG_GPRS_MASK 0x0f3d
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
670 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
671
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
672 #if DCO_ALGO
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
673 // DCO type of scheduling
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
674 #define C_CN_DCO_PARAM 0xA248
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
675 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
676
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
677 #elif (DSP == 34) // ROM Code GPRS AMR.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
678 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
679 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
680 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
681 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
682 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
683 #define AEC 1 // AEC/NS not supported.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
684 #define L1_NEW_AEC 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
685
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
686 #if ((L1_NEW_AEC) && (!AEC))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
687 // First undef the flag to avoid warnings at compilation time
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
688 #undef AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
689 #define AEC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
690 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
691 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
692
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
693 #define DSP_START 0x7000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
694
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
695 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
696
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
697 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
698 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
699
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
700 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
701
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
702 #if (CODE_VERSION == NOT_SIMULATION)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
703 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
704 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
705 // DSP_IDLE3 is not supported in simulation
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
706 #else
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
707 #define W_A_DSP_IDLE3 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
708 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
709
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
710 // DSP software work-around config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
711 // bit0 - Work-around to support CRTG.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
712 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
713 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
714 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
715 #if (ANLG_FAM == 1) // OMEGA / NAUSICA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
716 #define C_DSP_SW_WORK_AROUND 0x0006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
717
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
718 #elif (ANLG_FAM == 2) // IOTA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
719 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
720
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
721 #elif (ANLG_FAM == 3) // SYREN
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
722 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
723
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
724 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
725
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
726 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
727 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
728 #if (MELODY_E2)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
729 // In case of the melody E2 the DSP trace must be disable because the
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
730 // melody instrument waves are overlayed with DSP trace buffer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
731
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
732 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
733 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
734 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
735
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
736 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
737 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
738 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
739 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
740
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
741 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
742 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
743 // Currently not supported !
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
744 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
745 #else
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
746 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
747 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
748 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
749
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
750 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
751 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
752 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
753 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Buffer Header.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
754
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
755 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
756 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
757 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
758
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
759 // AMR trace
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
760 #define C_AMR_TRACE_ID 55
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
761
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
762 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
763 /* d_error_status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
764 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
765
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
766 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
767 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
768
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
769 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
770 #define DSP_DEBUG_GSM_MASK 0x08BD // L1_MCU-SPR-15852
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
771 #define DSP_DEBUG_GPRS_MASK 0x0f3d
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
772 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
773
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
774 #elif (DSP == 35) // ROM Code GPRS AMR.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
775 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
776 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
777 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
778 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
779 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
780 #define AEC 1 // AEC/NS not supported.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
781 #define L1_NEW_AEC 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
782
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
783 #if ((L1_NEW_AEC) && (!AEC))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
784 // First undef the flag to avoid warnings at compilation time
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
785 #undef AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
786 #define AEC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
787 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
788 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
789
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
790 #define FF_L1_TCH_VOCODER_CONTROL 1
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
791 #define W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 1
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
792
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
793 #define DSP_START 0x7000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
794
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
795 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
796
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
797 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
798 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
799
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
800 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
801
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
802 #if (CODE_VERSION == NOT_SIMULATION)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
803 #if (CHIPSET != 12)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
804 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
805 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
806 // DSP_IDLE3 is not supported in simulation
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
807 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
808 #define W_A_DSP_IDLE3 0 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
809 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
810 // DSP_IDLE3 is not supported in simulation
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
811 #endif // CHIPSET 12
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
812 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
813 #define W_A_DSP_IDLE3 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
814 #endif
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
815
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
816 #define W_A_DSP_PR20037 1
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
817
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
818 // DSP software work-around config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
819 // bit0 - Work-around to support CRTG.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
820 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
821 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
822 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
823 #if (ANLG_FAM == 1) // OMEGA / NAUSICA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
824 #define C_DSP_SW_WORK_AROUND 0x0006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
825
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
826 #elif (ANLG_FAM == 2) // IOTA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
827 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
828
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
829 #elif (ANLG_FAM == 3) // SYREN
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
830 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
831
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
832 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
833
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
834 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
835 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
836 #if (MELODY_E2)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
837 // In case of the melody E2 the DSP trace must be disable because the
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
838 // melody instrument waves are overlayed with DSP trace buffer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
839
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
840 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
841 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
842 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
843
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
844 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
845 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
846 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
847 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
848
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
849 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
850 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
851 // Currently not supported !
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
852 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
853 #else
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
854 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
855 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
856 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
857
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
858 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
859 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
860 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
861 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Timer + Buffer Header + Burst.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
862
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
863 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
864 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
865 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
866
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
867 // AMR trace
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
868 #define C_AMR_TRACE_ID 55
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
869
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
870 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
871 /* d_error_status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
872 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
873
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
874 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
875 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
876
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
877 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
878 #define DSP_DEBUG_GSM_MASK 0x08BD // L1_MCU-SPR-15852
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
879 #define DSP_DEBUG_GPRS_MASK 0x0f3d
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
880 #endif
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
881 #elif (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39) // ROM Code GPRS AMR.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
882
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
883 #if ((L1_PCM_EXTRACTION) && (SPEECH_RECO))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
884 #error "PCM extraction and Speech recognition not supported simultaneously"
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
885 #endif
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
886
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
887 #define CLKMOD1 0x4006 // ...
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
888 #define CLKMOD2 0x4116 // ...65 Mips pll free
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
889 #define CLKSTART 0x29 // ...65 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
890 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
891 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
892 #define AEC 0 // AEC/NS not supported.
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
893 #define L1_NEW_AEC 0
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
894
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
895 #if ((L1_NEW_AEC) && (!AEC))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
896 // First undef the flag to avoid warnings at compilation time
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
897 #undef AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
898 #define AEC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
899 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
900 #define MAP 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
901 #undef L1_AMR_NSYNC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
902 #define L1_AMR_NSYNC 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
903 #define FF_L1_TCH_VOCODER_CONTROL 1
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
904 #define W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 1
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
905
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
906 #define DSP_START 0x7000
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
907
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
908 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
909
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
910 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
911 #define ULYSSE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
912
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
913 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
914
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
915 #if (CODE_VERSION == NOT_SIMULATION)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
916 #if ((CHIPSET != 12) && (CHIPSET != 15))
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
917 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
918 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
919 // DSP_IDLE3 is not supported in simulation
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
920 #else // CHIPSET 12
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
921 #define W_A_DSP_IDLE3 0 // Work around to report DSP state to the ARM for Deep Sleep
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
922 // management.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
923 // DSP_IDLE3 is not supported in simulation
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
924 #endif // CHIPSET 12
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
925 #else // CODE_VERSION
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
926 #define W_A_DSP_IDLE3 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
927 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
928
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
929 #define W_A_DSP_PR20037 1
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
930
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
931 // DSP software work-around config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
932 // bit0 - Work-around to support CRTG.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
933 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
934 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
935 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
936 #if (ANLG_FAM == 1) // OMEGA / NAUSICA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
937 #define C_DSP_SW_WORK_AROUND 0x0006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
938
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
939 #elif (ANLG_FAM == 2) // IOTA
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
940 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
941
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
942 #elif (ANLG_FAM == 3) // SYREN
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
943 #define C_DSP_SW_WORK_AROUND 0x000E
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
944
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
945 #elif (ANLG_FAM == 11) // TRITON
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
946 #define C_DSP_SW_WORK_AROUND 0x000E
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
947
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
948 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
949
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
950 /* DSP debug trace configuration */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
951 /*-------------------------------*/
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
952 // Note:
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
953 // In case of melody E2, MP3, AAC or Dyn Dwnld ACTIVITY the DSP trace is automatically disabled
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
954 // because the melody instrument waves are overlayed with DSP trace buffer (supported since patch 7c20)
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
955
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
956 // DSP debug trace API buffer config
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
957 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
958 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
959
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
960 // DSP debug trace type config
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
961 // |<-------------- Features -------------->|<---------- Levels ----------->|
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
962 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
963
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
964 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4)// C_DEBUG_TRACE_TYPE 0x0012 changed from 0x0054 for DSP load reduce
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
965 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = KERNEL; Features = Timer, Burst, Buffer Header.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
966 #else
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
967 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = KERNEL; Features = Timer, Burst, Buffer Header.
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
968 #endif
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
969
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
970
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
971 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
972 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
973 // Currently not supported !
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
974 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
975
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
976 // AMR trace
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
977 #define C_AMR_TRACE_ID 55
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
978
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
979
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
980 /* d_error_status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
981 /*-------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
982
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
983 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
984 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
985
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
986 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
987 #define DSP_DEBUG_GSM_MASK 0x08BD // L1_MCU-SPR-15852
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
988 #define DSP_DEBUG_GPRS_MASK 0x0f3d
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
989 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
990 #endif // DSP
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
991
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
992 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
993 /* Default value */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
994 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
995 #ifndef W_A_DSP1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
996 #define W_A_DSP1 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
997 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
998
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
999 #ifndef DATA14_4
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1000 #define DATA14_4 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1001 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1002
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1003 #ifndef W_A_ITFORCE
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1004 #define W_A_ITFORCE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1005 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1006
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1007 #ifndef W_A_DSP_IDLE3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1008 #define W_A_DSP_IDLE3 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1009 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1010
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1011 #ifndef L1_NEW_AEC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1012 #define L1_NEW_AEC 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1013 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1014
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1015 #ifndef DSP_DEBUG_TRACE_ENABLE
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1016 #define DSP_DEBUG_TRACE_ENABLE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1017 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1018
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1019 #ifndef DEBUG_DEDIC_TCH_BLOCK_STAT
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1020 #define DEBUG_DEDIC_TCH_BLOCK_STAT 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1021 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1022
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1023 #ifndef D_ERROR_STATUS_TRACE_ENABLE
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1024 #define D_ERROR_STATUS_TRACE_ENABLE 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1025 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1026
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1027 #ifndef L1_GTT
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1028 #define L1_GTT 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1029 #define TTY_SYNC_MCU 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1030 #define TTY_SYNC_MCU_2 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1031 #define L1_GTT_FIFO_TEST_ATOMIC 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1032 #define NEW_WKA_PATCH 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1033 #define OPTIMISED 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1034 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1035
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1036 #ifndef L1_AMR_NSYNC
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1037 #define L1_AMR_NSYNC 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1038 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1039
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1040 #ifndef FF_L1_TCH_VOCODER_CONTROL
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1041 #define FF_L1_TCH_VOCODER_CONTROL 0
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1042 #define W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 0
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1043 #define W_A_DSP_PR20037 0
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1044 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1045
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1046
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1047 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1048 /* Download */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1049 /*------------------------------------*/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1050
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1051
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1052 /* Possible values for the download status */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1053
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1054 #define LEAD_READY 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1055 #define BLOCK_READY 2
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1056 #define PROGRAM_DONE 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1057 #define PAGE_SELECTION 4
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1058
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1059
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1060 /************************************/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1061 /* Options of compilation... */
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1062 /************************************/
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1063
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1064 // Possible choice of hardware plateform.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1065 #define GEMINI 1 // GEMINI chip (rom dsp code)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1066 #define POLESTAR 2 // POLESTAR chip (no rom)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1067
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1068 // Possible choice for DSP software setup.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1069 #define NO_DWNLD 0
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1070 #define PATCH_DWNLD 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1071 #define DSP_DWNLD 2
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1072 #define PATCH_DSP_DWNLD 3
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1073
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1074 // MAC-S status reporting to Layer 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1075 #define MACS_STATUS 0 // MAC-S STATUS activated if set to 1
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1076
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1077 // Possible choice for dll_dcch_downlink interface (with FN or without FN)
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1078 #define SEND_FN_TO_L2_IN_DCCH 0
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1079
530
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1080
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1081 #define L1_CHECK_COMPATIBLE 1 //Check L1A message compatiblity
25a7fe25864c gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 526
diff changeset
1082
115
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1083
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1084 //---------------------------------------------------------------------------------
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1085
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1086 #endif /* __L1_CONFG_H__ */