FreeCalypso > hg > fc-magnetite
annotate src/cs/system/main/init.c @ 560:d380b62e1019
tpudrv12.h: provision for future FCFAM triband-or-quadband support
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 29 Dec 2018 04:06:37 +0000 |
parents | 838eeafb0051 |
children | 92dbfa906f66 |
rev | line source |
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1 /* |
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2 * INIT.C |
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3 * |
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4 * This module allows to initialize the board: |
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5 * - wait states, |
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6 * - unmask selected interrupts, |
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7 * - initialize clock, |
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8 * - disable watchdog. |
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9 * Dummy functions used by the EVA3 library are defined. |
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10 */ |
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11 |
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12 /* Config Files */ |
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13 |
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14 #ifndef _WINDOWS |
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15 #include "l1sw.cfg" |
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16 #include "rf.cfg" |
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17 #include "chipset.cfg" |
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18 #include "board.cfg" |
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19 #include "swconfig.cfg" |
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20 #include "fc-target.cfg" |
265
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21 #if (OP_L1_STANDALONE == 0) |
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22 #include "rv.cfg" |
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23 #include "sys.cfg" |
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24 #include "debug.cfg" |
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25 #ifdef BLUETOOTH_INCLUDED |
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26 #include "btemobile.cfg" |
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27 #endif |
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28 #ifdef BLUETOOTH |
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29 #include "bluetooth.cfg" |
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30 #endif |
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31 #endif |
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32 |
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33 #if (OP_L1_STANDALONE == 0) |
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34 #include "rv/rv_defined_swe.h" |
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35 #endif |
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36 #endif |
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37 |
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38 /* Include Files */ |
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39 #include <assert.h> |
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40 #include <ctype.h> |
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41 #include <stdarg.h> |
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42 #include <stdlib.h> |
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43 #include <string.h> |
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44 |
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45 #include "nucleus.h" |
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46 |
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47 #include "sys_types.h" |
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48 #include "l1_types.h" |
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49 #include "l1_confg.h" |
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50 #include "l1_const.h" |
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51 |
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52 #if TESTMODE |
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53 #include "l1tm_defty.h" |
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54 #endif // TESTMODE |
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55 |
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56 #if (AUDIO_TASK == 1) |
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57 #include "l1audio_const.h" |
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58 #include "l1audio_cust.h" |
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59 #include "l1audio_defty.h" |
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60 #endif // AUDIO_TASK |
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61 |
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62 #if (L1_GTT == 1) |
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63 #include "l1gtt_const.h" |
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64 #include "l1gtt_defty.h" |
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65 #endif |
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66 |
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67 #if (L1_MP3 == 1) |
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68 #include "l1mp3_defty.h" |
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69 #endif |
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70 |
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71 #if (L1_MIDI == 1) |
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72 #include "l1midi_defty.h" |
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73 #endif |
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74 |
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75 #if (L1_AAC == 1) |
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76 #include "l1aac_defty.h" |
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77 #endif |
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78 #if (L1_DYN_DSP_DWNLD == 1) |
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79 #include "l1_dyn_dwl_defty.h" |
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80 #endif |
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81 |
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82 #if (TRACE_TYPE == 4) |
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83 #include "l1_defty.h" |
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84 #endif |
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85 |
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86 |
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87 #if ((OP_L1_STANDALONE == 1) && (CODE_VERSION != SIMULATION) && (PSP_STANDALONE == 0)) |
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88 |
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89 #if (AUDIO_TASK == 1) |
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90 #include "l1audio_signa.h" |
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91 #include "l1audio_msgty.h" |
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92 #endif // AUDIO_TASK |
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93 |
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94 #if (L1_GTT == 1) |
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95 #include "l1gtt_signa.h" |
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96 #include "l1gtt_msgty.h" |
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97 #endif |
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98 |
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99 #include "l1_defty.h" |
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100 #include "cust_os.h" |
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101 #include "l1_msgty.h" |
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102 #include "nu_main.h" |
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103 #include "l1_varex.h" |
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104 #include "l1_proto.h" |
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105 #include "hw_debug.h" |
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106 #include "l1_trace.h" |
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107 |
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108 #endif /* ((OP_L1_STANDALONE == 1) && (CODE_VERSION != SIMULATION) && (PSP_STANDALONE==0)) */ |
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109 |
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110 |
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111 #include "armio/armio.h" |
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112 #include "timer/timer.h" |
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113 |
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114 #if (OP_L1_STANDALONE == 0) |
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115 #include "rvf/rvf_api.h" |
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116 #include "rvm/rvm_api.h" /* A-M-E-N-D-E-D! */ |
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117 #include "sim/sim.h" |
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118 #endif |
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119 |
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120 #include "abb/abb.h" |
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121 |
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122 #include "inth/iq.h" |
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123 #include "tpudrv.h" |
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124 #include "memif/mem.h" |
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125 #include "clkm/clkm.h" |
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126 #include "inth/inth.h" |
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127 |
267
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128 #if (OP_L1_STANDALONE == 1) |
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129 #include "uart/serialswitch_core.h" |
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130 #else |
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131 #include "uart/serialswitch.h" |
265
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132 #endif |
267
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133 #include "uart/traceswitch.h" |
265
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134 |
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135 |
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136 #include "dma/dma.h" |
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137 #include "rhea/rhea_arm.h" |
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138 |
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139 #include "ulpd/ulpd.h" |
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140 |
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141 #if (PSP_STANDALONE == 0) |
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142 #if (OP_L1_STANDALONE == 0) |
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143 extern void ffs_main_init(void); |
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144 extern void create_tasks(void); |
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145 #if TI_NUC_MONITOR == 1 |
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146 extern void ti_nuc_monitor_tdma_action( void ); |
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147 #endif |
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148 |
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149 #if WCP_PROF == 1 |
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150 #if PRF_CALIBRATION == 1 |
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151 extern NU_HISR prf_CalibrationHISR; |
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152 #endif |
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153 #endif |
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154 |
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155 #else |
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156 void l1ctl_pgm_clk32(UWORD32 nb_hf, UWORD32 nb_32khz); |
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157 extern void L1_trace_string(char *s); |
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158 #endif /* (OP_L1_STANDALONE) */ |
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159 #endif |
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160 |
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161 #if (OP_L1_STANDALONE == 1) |
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162 #if ((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==7) || TESTMODE) |
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163 #include "uart/uart.h" |
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164 /* |
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165 * Serial Configuration set up. |
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166 */ |
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167 |
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168 extern char ser_cfg_info[NUMBER_OF_TR_UART]; |
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169 #include "rvt_gen.h" |
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170 extern T_RVT_USER_ID trace_id; |
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171 #endif |
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172 #endif /* (OP_L1_STANDALONE == 1) */ |
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173 |
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174 /* |
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175 * Serial Configuration set up. |
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176 */ |
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177 |
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178 /* |
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179 ** One config is: |
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180 ** {XXX_BT_HCI, // Bluetooth HCI |
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181 ** XXX_FAX_DATA, // Fax/Data AT-Cmd |
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182 ** XXX_TRACE, // L1/Riviera Trace Mux |
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183 ** XXX_TRACE}, // Trace PS |
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184 ** |
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185 ** with XXX being DUMMY, UART_IRDA or UART_MODEM |
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186 */ |
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187 |
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188 #if ((((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==7) ||\ |
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189 (TESTMODE)) && (OP_L1_STANDALONE == 1)) || (OP_L1_STANDALONE == 0)) |
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190 #if (OP_L1_STANDALONE == 1) |
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191 static T_AppliSerialInfo appli_ser_cfg_info = |
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192 #else |
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193 T_AppliSerialInfo appli_ser_cfg_info = |
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194 #endif /* OP_L1_STANDALONE */ |
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195 { |
273
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196 #ifdef CONFIG_RVTMUX_ON_MODEM |
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197 {DUMMY_BT_HCI, |
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198 DUMMY_FAX_DATA, |
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199 UART_MODEM_TRACE, |
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200 DUMMY_TRACE}, // 0x0248 |
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201 #else // RVTMUX_ON_MODEM |
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202 {DUMMY_BT_HCI, |
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203 UART_MODEM_FAX_DATA, |
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204 UART_IRDA_TRACE, |
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205 DUMMY_TRACE}, // default config = 0x0168 |
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206 #endif |
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207 #ifdef BTEMOBILE |
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208 12, // 12 serial config allowed |
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209 #else // BTEMOBILE |
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210 9, // 9 serial config allowed |
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211 #endif |
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212 { |
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213 // Configs with Condat Panel only |
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214 {DUMMY_BT_HCI, |
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215 DUMMY_FAX_DATA, |
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216 DUMMY_TRACE, |
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217 UART_IRDA_TRACE}, // 0x1048 |
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218 {DUMMY_BT_HCI, |
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219 DUMMY_FAX_DATA, |
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220 DUMMY_TRACE, |
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221 UART_MODEM_TRACE}, // 0x2048 |
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222 // Configs with L1/Riviera Trace only |
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223 {DUMMY_BT_HCI, |
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224 DUMMY_FAX_DATA, |
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225 UART_IRDA_TRACE, |
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226 DUMMY_TRACE}, // 0x0148 |
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227 {DUMMY_BT_HCI, |
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228 DUMMY_FAX_DATA, |
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229 UART_MODEM_TRACE, |
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230 DUMMY_TRACE}, // 0x0248 |
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231 // Configs with AT-Cmd only |
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232 {DUMMY_BT_HCI, |
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233 UART_MODEM_FAX_DATA, |
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234 DUMMY_TRACE, |
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235 DUMMY_TRACE}, // 0x0068 |
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236 // Configs with Condat Panel and L1/Riviera Trace |
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237 {DUMMY_BT_HCI, |
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238 DUMMY_FAX_DATA, |
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239 UART_MODEM_TRACE, |
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240 UART_IRDA_TRACE}, // 0x1248 |
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241 {DUMMY_BT_HCI, |
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242 DUMMY_FAX_DATA, |
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243 UART_IRDA_TRACE, |
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244 UART_MODEM_TRACE}, // 0x2148 |
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245 // Configs with Condat Panel and AT-Cmd |
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246 {DUMMY_BT_HCI, |
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247 UART_MODEM_FAX_DATA, |
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248 DUMMY_TRACE, |
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249 UART_IRDA_TRACE}, // 0x1068 |
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250 #ifdef BTEMOBILE |
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251 // Configs with L1/Riviera Trace and Bluetooth HCI |
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252 {UART_IRDA_BT_HCI, |
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253 DUMMY_FAX_DATA, |
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254 UART_MODEM_TRACE, |
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255 DUMMY_TRACE}, // 0x0249 |
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256 {UART_MODEM_BT_HCI, |
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257 DUMMY_FAX_DATA, |
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258 UART_IRDA_TRACE, |
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259 DUMMY_TRACE}, // 0x014A |
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260 // Configs with AT-Cmd and Bluetooth HCI |
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261 {UART_IRDA_BT_HCI, |
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262 UART_MODEM_FAX_DATA, |
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263 DUMMY_TRACE, |
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264 DUMMY_TRACE}, // 0x0069 |
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265 #endif // BTEMOBILE |
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266 // Configs with L1/Riviera Trace and AT-Cmd |
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267 {DUMMY_BT_HCI, |
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268 UART_MODEM_FAX_DATA, |
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269 UART_IRDA_TRACE, |
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270 DUMMY_TRACE} // 0x0168 |
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271 } |
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272 }; |
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273 #endif /* (TRACE_TYPE ...) || (OP_L1_STANDALONE == 0) */ |
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274 |
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275 |
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276 /* |
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277 * Init_Target |
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278 * |
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279 * Performs low-level HW Initialization. |
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280 */ |
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281 void Init_Target(void) |
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282 { |
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283 #if (BOARD == 5) |
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284 #define WS_ROM (1) |
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285 #define WS_RAM (1) |
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286 #define WS_APIF (1) |
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287 #define WS_CS2 (7) /* LCD on EVA3. */ |
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288 #define WS_CS0 (7) /* DUART on EVA3. UART16750 and latch on A-Sample. */ |
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289 #define WS_CS1 (7) /* LCD on A-Sample. */ |
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290 |
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291 IQ_InitWaitState (WS_ROM, WS_RAM, WS_APIF, WS_CS2, WS_CS0, WS_CS1); |
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292 IQ_InitClock (2); /* Internal clock division factor. */ |
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293 |
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294 IQ_MaskAll (); /* Mask all interrupts. */ |
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295 IQ_SetupInterrupts (); /* IRQ priorities. */ |
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296 |
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297 TM_DisableWatchdog (); |
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298 |
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299 /* |
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300 * Reset all TSP and DBG fdefault values |
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301 */ |
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302 |
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303 AI_ResetTspIO (); |
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304 AI_ResetDbgReg (); |
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305 AI_ResetIoConfig (); |
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306 |
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307 /* |
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308 * Warning! The external reset signal is connected to the Omega and the |
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309 * external device. If the layer 1 is used its initialization removes |
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310 * the external reset. If the application does not use the layer 1 |
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311 * you must remove the external reset (bit 2 of the reset control |
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312 * register 0x505808). |
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313 */ |
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314 |
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315 AI_ResetTspIO(); |
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316 AI_ResetDbgReg(); |
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317 AI_ResetIoConfig(); |
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318 |
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319 /* |
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320 * Configure all IOs (see RD300 specification). |
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321 */ |
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322 |
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323 AI_ConfigBitAsInput (1); |
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324 AI_EnableBit (1); |
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325 |
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326 AI_ConfigBitAsOutput (2); |
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327 AI_EnableBit (2); |
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328 |
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329 AI_ConfigBitAsInput (11); |
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330 AI_EnableBit (11); |
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331 |
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332 AI_ConfigBitAsOutput (13); |
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333 AI_EnableBit (13); |
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334 |
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335 AI_Power (1); /* Maintain power supply. */ |
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336 |
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337 #elif (BOARD == 6) || (BOARD == 7) || (BOARD == 8) || (BOARD == 9) || \ |
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338 (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45) || \ |
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339 (BOARD == 35) || (BOARD == 46) || (BOARD == 70) || (BOARD == 71) |
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340 |
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341 #if (PSP_STANDALONE == 0) |
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342 // RIF/SPI rising edge clock for ULYSSE |
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343 //-------------------------------------------------- |
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344 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)|| (ANLG_FAM == 11)) |
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345 #if ((CHIPSET >= 3)) |
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346 #if (CHIPSET == 12) |
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347 F_CONF_RIF_RX_RISING_EDGE; |
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348 F_CONF_SPI_RX_RISING_EDGE; |
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349 #elif (CHIPSET == 15) |
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350 //do the DRP init here for Locosto |
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351 #if (L1_DRP == 1) |
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352 // drp_power_on(); This should be done after the script is downloaded. |
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353 #endif |
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354 #else |
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355 #if (BOARD==35) |
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356 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x2000; |
286
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357 #elif defined(CONFIG_TARGET_PIRELLI) |
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358 /* |
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359 * Pirelli's version of this Init_Target() function |
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360 * in their fw sets the ASIC_CONF register to 0x6050, |
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361 * which means PWL on the LT/PWL pin and LPG on the |
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362 * DSR_MODEM pin. |
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363 */ |
271
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364 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x6050; |
286
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365 #elif defined(CONFIG_TARGET_GTAMODEM) |
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366 /* |
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367 * The DSR_MODEM/LPG Calypso signal is unconnected on |
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368 * Openmoko's modem, so let's mux it as LPG (output) |
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369 * so it doesn't float, like Foxconn seem to have done |
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370 * on the Pirelli. |
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371 */ |
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372 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x6040; |
265
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373 #else |
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374 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x6000; |
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375 #endif /* (BOARD == 35) */ |
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376 #endif |
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377 #endif |
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378 #endif /* ANLG(ANALOG)) */ |
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379 |
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380 #if (OP_L1_STANDALONE == 1) |
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381 #if (BOARD == 40) || (BOARD == 41) || \ |
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382 (BOARD == 42) || (BOARD == 43) || (BOARD == 45) |
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383 // enable 8 Ohm amplifier for audio on D-sample |
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384 AI_ConfigBitAsOutput (1); |
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385 AI_SetBit(1); |
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386 #elif (BOARD == 70) || (BOARD == 71) |
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387 //Locosto I-sample or UPP costo board.BOARD |
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388 // Initialize the ARMIO bits as per the I-sample spec |
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389 // FIXME |
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390 #endif |
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391 #endif /* (OP_L1_STANDALONE == 1) */ |
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392 #endif /* PSP_STANDALONE ==0 */ |
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393 |
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394 // Watchdog |
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395 //-------------------------------------------------- |
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396 TM_DisableWatchdog(); /* Disable Watchdog */ |
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397 #if (CHIPSET == 12) || (CHIPSET == 15) |
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398 TM_SEC_DisableWatchdog(); |
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399 #endif |
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400 |
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401 #if ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)) |
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402 |
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403 #if (CHIPSET == 12) |
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404 |
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405 #if 0 /* example of configuration for DMA debug */ |
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406 #if (BOARD == 6) /* debug on EVA 4 , GPO2 must not be changed */ |
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407 |
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408 /* TPU_FRAME, NMIIT, IACKn */ |
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409 F_DBG_IRQ_CONFIG(C_DBG_IRQ_IRQ4|C_DBG_IRQ_NMIIT|C_DBG_IRQ_IACKN); |
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410 |
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411 /* NDMA_REQ_VIEW1, NDMA_REQ_VIEW0, DMA_V(1), DMA_S(1), DMAREQ_P1(3:0)*/ |
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412 F_DBG_DMA_P1_NDFLASH_CONFIG(C_DBG_DMA_P1_NDFLASH_NDMA_REQ_VIEW_1 | |
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413 C_DBG_DMA_P1_NDFLASH_NDMA_REQ_VIEW_0 | |
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414 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_3 | |
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415 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_2 | |
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416 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_1 | |
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417 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_0 | |
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418 C_DBG_DMA_P1_NDFLASH_DMA_REQ_S_1 | |
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419 C_DBG_DMA_P1_NDFLASH_DMA_REQ_V1 ); |
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420 /* DMA_REQ_S(2)*/ |
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421 F_DBG_DMA_P2_CONFIG(C_DBG_DMA_P2_DMA_REQ_S2); |
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422 |
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423 /* DMA_CLK_REQ, BRIDGE_CLK */ |
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424 F_DBG_CLK1_CONFIG(C_DBG_CLK1_DMA_CLK_REQ | |
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425 C_DBG_CLK1_BRIDGE_CLK ); |
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426 |
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427 /* XIO_nREADY */ |
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428 F_DBG_IMIF_CONFIG(C_DBG_IMIF_XIO_NREADY_MEM); |
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429 |
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430 /* DSP_nIRQ_VIEW1, DSP_nIRQ_VIEW0, BRIDGE_EN */ |
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431 F_DBG_KB_USIM_SHD_CONFIG(C_DBG_KB_USIM_SHD_DSP_NIRQ_VIEW_1 | |
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432 C_DBG_KB_USIM_SHD_DSP_NIRQ_VIEW_0 | |
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433 C_DBG_KB_USIM_SHD_BRIDGE_EN ); |
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434 |
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435 /* RHEA_nREADY , RHEA_nSTROBE */ |
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436 F_DBG_USIM_CONFIG(C_DBG_USIM_RHEA_NSTROBE | |
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437 C_DBG_USIM_RHEA_NREADY ); |
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438 |
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439 /* XIO_STROBE */ |
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440 F_DBG_MISC2_CONFIG(C_DBG_MISC2_X_IOSTRBN); |
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441 |
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442 /* DMA_CLK_REQ */ |
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443 F_DBG_CLK2_CONFIG(C_DBG_CLK2_DMA_CLK_REQ2); |
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444 |
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445 /* DSP_IRQ_SEL0=DMA, DSP_IRQ_SEL1=DMA, DMA_REQ_SEL0=RIF_RX, DMA_REQ_SEL1=RIF_RX */ |
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446 F_DBG_VIEW_CONFIG(0,0,C_DBG_DSP_INT_DMA, |
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447 C_DBG_DSP_INT_DMA, |
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448 C_DMA_CHANNEL_RIF_RX, |
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449 C_DMA_CHANNEL_RIF_RX); |
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450 |
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451 #endif /* (BOARD == 6) */ |
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452 #endif /* DMA debug example */ |
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453 #else |
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454 /* |
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455 * Configure ASIC in order to output the DPLL and ARM clock |
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456 */ |
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457 // (*( volatile UWORD16* )(0xFFFEF008)) = 0x8000; // DPLL |
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458 // (*( volatile UWORD16* )(0xFFFEF00E)) = 0x0004; // ARM clock |
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459 // (*( volatile UWORD16* )(0xfffef004)) = 0x0600; // DSP clock + nIACK |
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460 #endif /* (CHIPSET == 12) || CHIPSET == 15*/ |
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461 |
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462 |
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463 /* |
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464 * Enable/Disable of clock switch off for INTH, TIMER, BRIDGE and DPLL modules |
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465 */ |
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466 // IRQ, Timer and bridge may SLEEP |
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467 // In first step, same configuration as SAMSON |
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468 //-------------------------------------------------- |
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469 #if (CHIPSET == 12) |
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470 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_TIMER_DIS | CLKM_BRIDGE_DIS | CLKM_DPLL_DIS); |
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471 #elif (CHIPSET == 15) |
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472 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_TIMER_DIS | CLKM_CPORT_EN | CLKM_BRIDGE_DIS | 0x8000 ); /* CLKM_DPLL_DIS is remove by Ranga*/ |
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473 |
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474 #else |
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475 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_TIMER_DIS); |
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|
476 |
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477 // Select VTCXO input frequency |
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478 //-------------------------------------------------- |
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479 CLKM_UNUSED_VTCXO_26MHZ; |
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|
480 |
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|
481 // Rita RF uses 26MHz VCXO |
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|
482 #if (RF_FAM == 12) |
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|
483 CLKM_USE_VTCXO_26MHZ; |
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484 #endif |
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|
485 // Renesas RF uses 26MHz on F-sample but 13MHz on TEB |
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|
486 #if (RF_FAM == 43) && (BOARD == 46) |
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487 CLKM_USE_VTCXO_26MHZ; |
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488 #endif |
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|
489 #endif |
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|
490 |
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|
491 |
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|
492 // Control HOM/SAM automatic switching |
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|
493 //-------------------------------------------------- |
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494 *((volatile unsigned short *) CLKM_CNTL_CLK) &= ~CLKM_EN_IDLE3_FLG; |
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|
495 |
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496 /* |
269
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diff
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497 * The following part has been reconstructed from disassembly. |
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diff
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498 */ |
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diff
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499 RHEA_INITRHEA(0,0,0xFF); |
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500 DPLL_INIT_BYPASS_MODE(DPLL_BYPASS_DIV_1); |
407
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|
501 #if (CHIPSET == 8) |
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502 DPLL_INIT_DPLL_CLOCK(DPLL_LOCK_DIV_1, 6); |
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503 #elif (CHIPSET == 10) |
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504 DPLL_INIT_DPLL_CLOCK(DPLL_LOCK_DIV_1, 8); |
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505 #else |
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506 #error "We only have DPLL setup for CHIPSETs 8 and 10" |
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|
507 #endif |
269
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268
diff
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508 CLKM_InitARMClock(0x00, 2, 0); /* no low freq, no ext clock, div by 1 */ |
271
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diff
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509 /* |
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diff
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510 * FreeCalypso change: memory timings and widths |
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511 * are target-dependent. |
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270
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512 */ |
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513 #ifdef CONFIG_TARGET_PIRELLI |
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514 /* |
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diff
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515 * Pirelli's version of this Init_Target() function |
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|
516 * in their fw does the following: |
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517 */ |
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518 MEM_INIT_CS0(4, MEM_DVS_16, MEM_WRITE_EN, 0); |
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519 MEM_INIT_CS1(4, MEM_DVS_16, MEM_WRITE_EN, 0); |
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520 MEM_INIT_CS2(5, MEM_DVS_16, MEM_WRITE_EN, 0); |
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521 MEM_INIT_CS3(4, MEM_DVS_16, MEM_WRITE_EN, 0); |
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diff
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522 MEM_INIT_CS4(7, MEM_DVS_16, MEM_WRITE_EN, 0); |
417
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407
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|
523 #elif defined(CONFIG_TARGET_FCFAM) |
271
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270
diff
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524 /* |
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Mychaela Falconia <falcon@freecalypso.org>
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|
525 * The settings currently adopted for the FreeCalypso |
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diff
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|
526 * hardware family, only nCS0, nCS1 and nCS2 are used |
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diff
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527 * presently. |
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diff
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|
528 */ |
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270
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|
529 MEM_INIT_CS0(4, MEM_DVS_16, MEM_WRITE_EN, 0); |
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Mychaela Falconia <falcon@freecalypso.org>
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270
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530 MEM_INIT_CS1(4, MEM_DVS_16, MEM_WRITE_EN, 0); |
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531 MEM_INIT_CS2(4, MEM_DVS_16, MEM_WRITE_EN, 0); |
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532 MEM_INIT_CS3(4, MEM_DVS_16, MEM_WRITE_EN, 0); |
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|
533 MEM_INIT_CS4(4, MEM_DVS_16, MEM_WRITE_EN, 0); |
417
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534 #elif defined(CONFIG_TARGET_DSAMPLE) && (CHIPSET == 8) |
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more sensible MEMIF setup for D-Sample C05 target
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parents:
407
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|
535 /* |
706f4b71aceb
more sensible MEMIF setup for D-Sample C05 target
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parents:
407
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|
536 * On D-Sample C05 (older Calypso silicon version) the clocks |
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more sensible MEMIF setup for D-Sample C05 target
Mychaela Falconia <falcon@freecalypso.org>
parents:
407
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|
537 * run slower: the ARM clock runs at 39 MHz instead of 52 MHz. |
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parents:
407
diff
changeset
|
538 * Therefore, we need to use fewer wait states to effect |
706f4b71aceb
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parents:
407
diff
changeset
|
539 * the same memory speed. |
706f4b71aceb
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Mychaela Falconia <falcon@freecalypso.org>
parents:
407
diff
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|
540 */ |
706f4b71aceb
more sensible MEMIF setup for D-Sample C05 target
Mychaela Falconia <falcon@freecalypso.org>
parents:
407
diff
changeset
|
541 MEM_INIT_CS0(2, MEM_DVS_16, MEM_WRITE_EN, 0); |
706f4b71aceb
more sensible MEMIF setup for D-Sample C05 target
Mychaela Falconia <falcon@freecalypso.org>
parents:
407
diff
changeset
|
542 MEM_INIT_CS1(2, MEM_DVS_16, MEM_WRITE_EN, 0); |
706f4b71aceb
more sensible MEMIF setup for D-Sample C05 target
Mychaela Falconia <falcon@freecalypso.org>
parents:
407
diff
changeset
|
543 MEM_INIT_CS2(2, MEM_DVS_16, MEM_WRITE_EN, 0); |
706f4b71aceb
more sensible MEMIF setup for D-Sample C05 target
Mychaela Falconia <falcon@freecalypso.org>
parents:
407
diff
changeset
|
544 MEM_INIT_CS3(2, MEM_DVS_16, MEM_WRITE_EN, 0); |
706f4b71aceb
more sensible MEMIF setup for D-Sample C05 target
Mychaela Falconia <falcon@freecalypso.org>
parents:
407
diff
changeset
|
545 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0); |
271
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parents:
270
diff
changeset
|
546 #else |
e18367b5427e
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270
diff
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|
547 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
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|
548 * The original settings from Openmoko, |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
549 * only nCS0 and nCS1 are actually used, |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
550 * same as on Mot C1xx phones, |
e18367b5427e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
551 * the nCS2/3/4 settings are dummies from TI. |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
552 */ |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
553 MEM_INIT_CS0(3, MEM_DVS_16, MEM_WRITE_EN, 0); |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
554 MEM_INIT_CS1(3, MEM_DVS_16, MEM_WRITE_EN, 0); |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
555 MEM_INIT_CS2(5, MEM_DVS_16, MEM_WRITE_EN, 0); |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
556 MEM_INIT_CS3(3, MEM_DVS_16, MEM_WRITE_EN, 0); |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
557 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0); |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
558 #endif |
269
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
559 MEM_INIT_CS6(0, MEM_DVS_32, MEM_WRITE_EN, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
560 MEM_INIT_CS7(0, MEM_DVS_32, MEM_WRITE_DIS, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
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parents:
268
diff
changeset
|
561 RHEA_INITAPI(0,1); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
562 RHEA_INITARM(0,0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
563 DPLL_SET_PLL_ENABLE; |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
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parents:
268
diff
changeset
|
564 |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
565 /* |
265
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
566 * Disable and Clear all pending interrupts |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
567 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
568 #if (CHIPSET == 12) || (CHIPSET == 15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
569 F_INTH_DISABLE_ALL_IT; // MASK all it |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
570 F_INTH2_VALID_NEXT(C_INTH_IRQ); // reset current IT in INTH2 IRQ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
571 F_INTH_VALID_NEXT(C_INTH_IRQ); // reset current IT in INTH IRQ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
572 F_INTH_VALID_NEXT(C_INTH_FIQ); // reset current IT in INTH FIQ |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
573 F_INTH_RESET_ALL_IT; // reset all IRQ/FIQ source |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
574 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
575 INTH_DISABLEALLIT; |
269
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parents:
268
diff
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|
576 #if 0 /* not present in our reference binary object */ |
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init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
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268
diff
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|
577 INTH_RESETALLIT; |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
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268
diff
changeset
|
578 #endif |
265
0aa748b6413a
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parents:
diff
changeset
|
579 INTH_CLEAR; /* reset IRQ/FIQ source */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
580 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
581 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
582 // INTH |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
583 //-------------------------------------------------- |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
584 #if (CHIPSET == 12) || (CHIPSET == 15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
585 #if (GSM_IDLE_RAM != 0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
586 f_inth_setup((T_INTH_CONFIG *)a_inth_config_idle_ram); // setup configuration IT handlers |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
587 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
588 f_inth_setup((T_INTH_CONFIG *)a_inth_config); // setup configuration IT handlers |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
589 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
590 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
591 IQ_SetupInterrupts(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
592 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
593 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
594 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
595 #if (CHIPSET == 12) || (CHIPSET == 15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
596 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
597 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
598 f_dma_global_parameter_set((T_DMA_TYPE_GLOBAL_PARAMETER *)&d_dma_global_parameter); |
0aa748b6413a
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parents:
diff
changeset
|
599 #endif |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
600 f_dma_channel_allocation_set(C_DMA_CHANNEL_0, C_DMA_CHANNEL_DSP); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
601 #if (OP_L1_STANDALONE == 1) |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
602 f_dma_global_parameter_set((T_DMA_TYPE_GLOBAL_PARAMETER *)&d_dma_global_parameter); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
603 f_dma_channel_allocation_set(C_DMA_CHANNEL_0, C_DMA_CHANNEL_DSP); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
604 #endif |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
605 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
606 #else |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
607 // DMA |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
608 //-------------------------------------------------- |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
609 // channel0 = Arm, channel1 = Lead, channel2 = forced to Arm, channel3=forced to Arm, dma_burst = 0001, priority = same |
0aa748b6413a
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parents:
diff
changeset
|
610 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
611 DMA_ALLOCDMA(1,0,1,1); // Channel 1 used by DSP with RIF RX |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
612 #endif |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
613 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
614 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
615 /* CHIPSET = 4 or 7 or 8 or 10 or 11 or 12 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
616 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
617 #else |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
618 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
619 // RHEA Bridge |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
620 //-------------------------------------------------- |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
621 // ACCES_FAC_0 = 0, ACCES_FAC_1 = 0 ,TIMEOUT = 0x7F |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
622 RHEA_INITRHEA(0,0,0x7F); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
623 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
624 #if (CHIPSET == 6) |
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625 // WS_H = 1 , WS_L = 15 |
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626 RHEA_INITAPI(1,15); // should be 0x01E1 for 65 Mhz |
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627 #else |
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628 // WS_H = 0 , WS_L = 7 |
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629 RHEA_INITAPI(0,7); // should be 0x0101 for 65 Mhz |
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630 #endif |
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631 |
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632 // Write_en_0 = 0 , Write_en_1 = 0 |
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633 RHEA_INITARM(0,0); |
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634 |
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635 // INTH |
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636 //-------------------------------------------------- |
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637 INTH_DISABLEALLIT; // MASK all it |
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638 INTH_CLEAR; // reset IRQ/FIQ source |
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639 IQ_SetupInterrupts(); |
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640 |
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641 // DMA |
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642 //-------------------------------------------------- |
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643 // channel0 = Arm, channel1 = Lead, dma_burst = 0001, priority = same |
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644 DMA_ALLOCDMA(1,0,1,1); // should be 0x25 (channel 1 = lead) |
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645 |
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646 #if (CHIPSET == 6) |
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647 // Memory WS configuration for ULYSS/G1 (26 Mhz) board |
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648 //----------------------------------------------------- |
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649 MEM_INIT_CS2(2,MEM_DVS_16,MEM_WRITE_EN,0); |
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650 #endif |
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|
651 |
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diff
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652 // CLKM |
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653 //-------------------------------------------------- |
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654 CLKM_InitARMClock(0x00, 2); /* no low freq, no ext clock, div by 1 */ |
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655 |
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|
656 #if (CHIPSET == 6) |
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|
657 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_BRIDGE_DIS | CLKM_TIMER_DIS | CLKM_VTCXO_26); |
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658 #else |
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659 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_BRIDGE_DIS | CLKM_TIMER_DIS); |
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660 #endif |
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|
661 |
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662 #endif /* CHIPSET = 4 or 7 or 8 or 10 or 11 or 12 */ |
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parents:
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|
663 |
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diff
changeset
|
664 // Freeze ULPD timer .... |
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|
665 //-------------------------------------------------- |
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|
666 *((volatile SYS_UWORD16 *) ULDP_GSM_TIMER_INIT_REG ) = 0; |
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|
667 *((volatile SYS_UWORD16 *) ULDP_GSM_TIMER_CTRL_REG ) = TPU_FREEZE; |
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parents:
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|
668 |
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changeset
|
669 // reset INC_SIXTEEN and INC_FRAC |
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|
670 //-------------------------------------------------- |
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|
671 #if (OP_L1_STANDALONE == 1) |
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|
672 l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE,DEFAULT_32KHZ_VALUE); |
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673 #else |
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|
674 ULDP_INCSIXTEEN_UPDATE(132); //32768.29038 =>132, 32500 => 133 |
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|
675 // 26000 --> 166 |
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|
676 ULDP_INCFRAC_UPDATE(15840); //32768.29038 =>15840, 32500 => 21845 |
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parents:
diff
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|
677 // 26000 --> 43691 |
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|
678 #endif /* OP_L1_STANDALONE */ |
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parents:
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|
679 |
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parents:
diff
changeset
|
680 // program ULPD WAKE-UP .... |
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|
681 //================================================= |
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|
682 #if (CHIPSET == 2) |
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|
683 *((volatile SYS_UWORD16 *)ULDP_SETUP_FRAME_REG) = SETUP_FRAME; // 2 frame |
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|
684 *((volatile SYS_UWORD16 *)ULDP_SETUP_VTCXO_REG) = SETUP_VTCXO; // 31 periods |
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diff
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|
685 *((volatile SYS_UWORD16 *)ULDP_SETUP_SLICER_REG) = SETUP_SLICER; // 31 periods |
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diff
changeset
|
686 *((volatile SYS_UWORD16 *)ULDP_SETUP_CLK13_REG) = SETUP_CLK13; // 31 periods |
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|
687 #else |
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|
688 *((volatile SYS_UWORD16 *)ULDP_SETUP_FRAME_REG) = SETUP_FRAME; // 3 frames |
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parents:
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|
689 *((volatile SYS_UWORD16 *)ULDP_SETUP_VTCXO_REG) = SETUP_VTCXO; // 0 periods |
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diff
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|
690 *((volatile SYS_UWORD16 *)ULDP_SETUP_SLICER_REG) = SETUP_SLICER; // 31 periods |
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|
691 *((volatile SYS_UWORD16 *)ULDP_SETUP_CLK13_REG) = SETUP_CLK13; // 31 periods |
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|
692 *((volatile SYS_UWORD16 *)ULPD_SETUP_RF_REG) = SETUP_RF; // 31 periods |
0aa748b6413a
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|
693 #endif |
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|
694 |
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diff
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|
695 // Set Gauging versus HF (PLL) |
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|
696 //================================================= |
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|
697 ULDP_GAUGING_SET_HF; // Enable gauging versus HF |
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|
698 ULDP_GAUGING_HF_PLL; // Gauging versus PLL |
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|
699 |
0aa748b6413a
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diff
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|
700 // current supply for quartz oscillation |
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|
701 //================================================= |
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|
702 #if (OP_L1_STANDALONE == 1) |
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|
703 #if ((CHIPSET != 9) && (CHIPSET != 12) && (CHIPSET !=15)) // programming model changed for Ulysse C035, stay with default value |
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|
704 *(volatile SYS_UWORD16 *)QUARTZ_REG = 0x27; |
0aa748b6413a
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|
705 #endif |
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|
706 #else |
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|
707 #if ((BOARD == 6) || (BOARD == 8) || (BOARD == 9) || (BOARD == 35) || (BOARD == 40) || (BOARD == 41)) |
0aa748b6413a
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|
708 *((volatile SYS_UWORD16 *)QUARTZ_REG) = 0x27; |
0aa748b6413a
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|
709 #elif (BOARD == 7) |
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|
710 *((volatile SYS_UWORD16 *)QUARTZ_REG) = 0x24; |
0aa748b6413a
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|
711 #endif |
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|
712 #endif /* OP_L1_STANDALONE */ |
0aa748b6413a
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diff
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|
713 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
714 // stop Gauging if any (debug purpose ...) |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
715 //-------------------------------------------------- |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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|
716 if ( *((volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG) & ULDP_GAUGING_EN) |
0aa748b6413a
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diff
changeset
|
717 { |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
718 volatile UWORD32 j; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
719 ULDP_GAUGING_STOP; /* Stop the gauging */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
720 /* wait for gauging it*/ |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
721 // one 32khz period = 401 periods of 13Mhz |
0aa748b6413a
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changeset
|
722 for (j=1; j<50; j++); |
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|
723 while (! (* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_IT_GAUGING); |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
724 } |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
725 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
726 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
727 AI_ClockEnable (); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
728 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
729 #if (BOARD == 7) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
730 // IOs configuration of the B-Sample in order to optimize the power consumption |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
731 AI_InitIOConfig(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
732 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
733 // Set LPG instead of DSR_MODEM |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
734 *((volatile SYS_UWORD16 *) ASIC_CONF) |= 0x40; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 // Reset the PERM_ON bit of LCR_REG |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
736 *((volatile SYS_UWORD16 *) MEM_LPG) &= ~(0x80); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
737 #elif ((BOARD == 8) || (BOARD == 9)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
738 // IOs configuration of the C-Sample in order to optimize the power consumption |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
739 AI_InitIOConfig(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
740 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
741 // set the debug latch to 0x00. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
742 *((volatile SYS_UWORD8 *) 0x2800000) = 0x00; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
743 #elif ((BOARD == 35) || (BOARD == 46)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
744 AI_InitIOConfig(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
745 // CSMI INTERFACE |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
746 // Initialize CSMI clients for GSM control |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
747 // and Fax/Data services |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
748 CSMI_Init(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
749 GC_Initialize(); // GSM control initialization |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
750 CU_Initialize(); // Trace initialization |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
751 CF_Initialize(); // Fax/Data pre-initialization |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
752 #elif ((BOARD == 40) || (BOARD == 41)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
753 // IOs configuration of the D-Sample in order to optimize the power consumption |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
754 AI_InitIOConfig(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
755 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
756 #ifdef BTEMOBILE |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
757 // Reset BT chip by toggling the Island's nRESET_OUT signal |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
758 *((volatile SYS_UWORD16 *) 0xFFFFFD04) |= 0x04; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
759 *((volatile SYS_UWORD16 *) 0xFFFFFD04) &= ~(0x4); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
760 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
761 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
762 // set the debug latch to 0x0000. |
271
e18367b5427e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
763 /* |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
764 * FreeCalypso change: this write is only correct when running |
e18367b5427e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
765 * on an actual D-Sample board, but not on any of the real-world |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
766 * Calypso target devices. |
e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
767 */ |
407
f7f1f6f1a77d
init.c module: a chance at being correct for the D-Sample target
Mychaela Falconia <falcon@freecalypso.org>
parents:
286
diff
changeset
|
768 #ifdef CONFIG_TARGET_DSAMPLE |
271
e18367b5427e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
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|
769 *((volatile SYS_UWORD16 *) 0x2700000) = 0x0000; |
e18367b5427e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
270
diff
changeset
|
770 #endif |
265
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
771 #endif // BOARD |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
772 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
773 // Enable HW Timers 1 & 2 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
774 TM_EnableTimer (1); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
775 TM_EnableTimer (2); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
776 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
777 #endif /* (OP_L1_STANDALONE == 0) */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
779 #endif /* #if (BOARD == 5) */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
780 } |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
782 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
783 * Init_Drivers |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
784 * |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
785 * Performs Drivers Initialization. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
786 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
787 void Set_Switch_ON_Cause(void); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
788 void Init_Drivers(void) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
789 { |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
790 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
791 #if (CHIPSET==15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
792 bspI2c_init(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
793 bspTwl3029_init(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
794 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
795 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
796 Set_Switch_ON_Cause(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
797 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
798 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
799 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
800 /* Turn on DRP We will make VRMCC to device group Modem |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
801 * And Switch it on. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
802 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
803 bspTwl3029_Power_setDevGrp(NULL,BSP_TWL3029_POWER_VRMMC,BSP_TWL3029_POWER_DEV_GRP_MODEM); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
804 wait_ARM_cycles(convert_nanosec_to_cycles(100000*2)); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
805 bspTwl3029_Power_enable(NULL,BSP_TWL3029_POWER_VRMMC,BSP_TWL3029_POWER_STATE_ACTIVE); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
806 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
807 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
808 #if (CHIPSET!=15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
809 #if ABB_SEMAPHORE_PROTECTION |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
810 // Create the ABB semaphore |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
811 ABB_Sem_Create(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
812 #endif // SEMAPHORE_PROTECTION |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
813 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
814 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
815 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
816 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
817 * Initialize FFS invoking restore procedure by MPU-S |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
818 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
819 #if ((BOARD == 35) || (BOARD == 46)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
820 GC_FfsRestore(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
821 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
822 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
823 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
824 * FFS main initialization. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
825 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
826 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
827 ffs_main_init(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
828 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
829 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
830 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
831 * Initialize Riviera manager and create tasks thanks to it. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
832 */ |
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833 #if (CHIPSET!=15) || (REMU==0) |
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834 rvf_init(); |
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|
835 rvm_init(); /* A-M-E-M-D-E-D! */ |
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836 create_tasks(); |
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837 #endif |
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838 /* |
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839 * SIM Main Initialization. |
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|
840 */ |
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841 #if (CHIPSET!=15) |
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842 SIM_Initialize (); |
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843 #else |
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844 bspUicc_bootInit(); |
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845 #endif |
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846 #endif |
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847 } |
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|
848 |
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|
849 /* |
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|
850 * Init_Serial_Flows |
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851 * |
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852 * Performs Serialswitch + related serial data flows initialization. |
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|
853 */ |
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|
854 void Init_Serial_Flows (void) |
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855 { |
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856 #if (OP_L1_STANDALONE == 0) |
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|
857 |
0aa748b6413a
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diff
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|
858 /* |
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|
859 * Initialize Serial Switch module. |
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|
860 */ |
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861 #if ((BOARD==35) || (BOARD == 46)) |
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862 SER_InitSerialConfig (GC_GetSerialConfig()); |
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863 #else |
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|
864 SER_InitSerialConfig (&appli_ser_cfg_info); |
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|
865 #endif |
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|
866 /* |
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867 * Then Initialize the Serial Data Flows and the associated UARTs: |
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|
868 * - G2-3 Trace if GSM/GPRS Protocol Stack |
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869 * - AT-Cmd/Fax & Data Flow |
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|
870 * |
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|
871 * Layer1/Riviera Trace Flow and Bluetooth HCI Flow are initialized |
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Mychaela Falconia <falcon@freecalypso.org>
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|
872 * by the appropriate SW Entities. |
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|
873 * |
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|
874 * G2-3 Trace => No more Used |
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|
875 */ |
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|
876 SER_tr_Init(SER_PROTOCOL_STACK, TR_BAUD_38400, NULL); |
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parents:
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|
877 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
878 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
879 * Fax & Data / AT-Command Interpreter Serial Data Flow Initialization |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
880 */ |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
881 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
882 #if ((BOARD != 35) && (BOARD != 46)) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
883 (void) SER_fd_Initialize (); |
0aa748b6413a
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parents:
diff
changeset
|
884 #endif |
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parents:
diff
changeset
|
885 #else /* OP_L1_STANDALONE */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
886 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
887 #if (TESTMODE || (TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==6) || (TRACE_TYPE==7)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
888 #if ((BOARD == 35) || (BOARD == 46)) |
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src/cs/system/Main/init.c: initial import from LoCosto source
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parents:
diff
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|
889 ser_cfg_info[UA_UART_0] = '0'; |
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|
890 #else |
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diff
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|
891 ser_cfg_info[UA_UART_0] = 'G'; |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
892 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
893 #if (CHIPSET !=15) |
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parents:
diff
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|
894 ser_cfg_info[UA_UART_1] = 'R'; // Riviear Demux on UART MODEM |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
895 #else |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
896 ser_cfg_info[UA_UART_0] = 'R'; // Riviear Demux on UART MODEM |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
897 #endif |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
898 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
899 /* init Uart Modem */ |
0aa748b6413a
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parents:
diff
changeset
|
900 SER_InitSerialConfig (&appli_ser_cfg_info); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
901 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
902 #if TESTMODE || (TRACE_TYPE == 1) || (TRACE_TYPE == 7) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
903 SER_tr_Init (SER_LAYER_1, TR_BAUD_115200, rvt_activate_RX_HISR); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
904 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
905 rvt_register_id("OTHER",&trace_id,(RVT_CALLBACK_FUNC)NULL); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
906 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
907 SER_tr_Init (SER_LAYER_1, TR_BAUD_38400, NULL); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
908 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
909 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
910 L1_trace_string(" \n\r"); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
911 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
912 #endif /* TRACE_TYPE */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
913 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
914 #endif /* OP_L1_STANDALONE */ |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
915 } |
270
d5a34ea92f2a
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269
diff
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|
916 |
d5a34ea92f2a
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269
diff
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|
917 /* |
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269
diff
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|
918 * Init_Unmask_IT |
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269
diff
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|
919 * |
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269
diff
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|
920 * Unmask all used interrupts. |
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269
diff
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|
921 */ |
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269
diff
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|
922 void Init_Unmask_IT (void) |
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269
diff
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|
923 { |
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269
diff
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|
924 IQ_Unmask(IQ_FRAME); |
d5a34ea92f2a
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269
diff
changeset
|
925 IQ_Unmask(IQ_UART_IRDA_IT); |
d5a34ea92f2a
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269
diff
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|
926 IQ_Unmask(IQ_UART_IT); |
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269
diff
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|
927 IQ_Unmask(IQ_ARMIO); |
d5a34ea92f2a
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269
diff
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|
928 #if (L1_DYN_DSP_DWNLD == 1) |
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269
diff
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|
929 IQ_Unmask(IQ_API); |
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Mychaela Falconia <falcon@freecalypso.org>
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269
diff
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|
930 #endif |
d5a34ea92f2a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
931 } |