FreeCalypso > hg > fc-magnetite
annotate src/cs/system/Main/init.c @ 270:d5a34ea92f2a
init.c: Init_Unmask_IT() reconstructed the trivial way
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 06 Aug 2017 17:58:13 +0000 |
parents | a498108254c9 |
children | e18367b5427e |
rev | line source |
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265
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1 /* |
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2 * INIT.C |
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3 * |
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4 * This module allows to initialize the board: |
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5 * - wait states, |
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6 * - unmask selected interrupts, |
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7 * - initialize clock, |
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8 * - disable watchdog. |
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9 * Dummy functions used by the EVA3 library are defined. |
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10 */ |
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11 |
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12 /* Config Files */ |
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13 |
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14 #ifndef _WINDOWS |
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15 #include "l1sw.cfg" |
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16 #include "rf.cfg" |
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17 #include "chipset.cfg" |
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18 #include "board.cfg" |
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19 #include "swconfig.cfg" |
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20 #if (OP_L1_STANDALONE == 0) |
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21 #include "rv.cfg" |
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22 #include "sys.cfg" |
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23 #include "debug.cfg" |
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24 #ifdef BLUETOOTH_INCLUDED |
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25 #include "btemobile.cfg" |
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26 #endif |
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27 #ifdef BLUETOOTH |
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28 #include "bluetooth.cfg" |
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29 #endif |
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30 #endif |
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31 |
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32 #if (OP_L1_STANDALONE == 0) |
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33 #include "rv/rv_defined_swe.h" |
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34 #endif |
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35 #endif |
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36 |
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37 /* Include Files */ |
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38 #include <assert.h> |
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39 #include <ctype.h> |
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40 #include <stdarg.h> |
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41 #include <stdlib.h> |
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42 #include <string.h> |
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43 |
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44 #include "nucleus.h" |
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45 |
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46 #include "sys_types.h" |
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47 #include "l1_types.h" |
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48 #include "l1_confg.h" |
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49 #include "l1_const.h" |
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50 |
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51 #if TESTMODE |
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52 #include "l1tm_defty.h" |
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53 #endif // TESTMODE |
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54 |
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55 #if (AUDIO_TASK == 1) |
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56 #include "l1audio_const.h" |
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57 #include "l1audio_cust.h" |
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58 #include "l1audio_defty.h" |
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59 #endif // AUDIO_TASK |
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60 |
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61 #if (L1_GTT == 1) |
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62 #include "l1gtt_const.h" |
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63 #include "l1gtt_defty.h" |
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64 #endif |
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65 |
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66 #if (L1_MP3 == 1) |
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67 #include "l1mp3_defty.h" |
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68 #endif |
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69 |
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70 #if (L1_MIDI == 1) |
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71 #include "l1midi_defty.h" |
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72 #endif |
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73 |
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74 #if (L1_AAC == 1) |
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75 #include "l1aac_defty.h" |
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76 #endif |
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77 #if (L1_DYN_DSP_DWNLD == 1) |
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78 #include "l1_dyn_dwl_defty.h" |
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79 #endif |
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80 |
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81 #if (TRACE_TYPE == 4) |
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82 #include "l1_defty.h" |
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83 #endif |
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84 |
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85 |
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86 #if ((OP_L1_STANDALONE == 1) && (CODE_VERSION != SIMULATION) && (PSP_STANDALONE == 0)) |
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87 |
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88 #if (AUDIO_TASK == 1) |
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89 #include "l1audio_signa.h" |
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90 #include "l1audio_msgty.h" |
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91 #endif // AUDIO_TASK |
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92 |
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93 #if (L1_GTT == 1) |
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94 #include "l1gtt_signa.h" |
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95 #include "l1gtt_msgty.h" |
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96 #endif |
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97 |
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98 #include "l1_defty.h" |
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99 #include "cust_os.h" |
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100 #include "l1_msgty.h" |
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101 #include "nu_main.h" |
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102 #include "l1_varex.h" |
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103 #include "l1_proto.h" |
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104 #include "hw_debug.h" |
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105 #include "l1_trace.h" |
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106 |
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107 #endif /* ((OP_L1_STANDALONE == 1) && (CODE_VERSION != SIMULATION) && (PSP_STANDALONE==0)) */ |
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108 |
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109 |
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110 #include "armio/armio.h" |
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111 #include "timer/timer.h" |
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112 |
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113 #if (OP_L1_STANDALONE == 0) |
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114 #include "rvf/rvf_api.h" |
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115 #include "rvm/rvm_api.h" /* A-M-E-N-D-E-D! */ |
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116 #include "sim/sim.h" |
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117 #endif |
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118 |
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119 #include "abb/abb.h" |
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120 |
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121 #include "inth/iq.h" |
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122 #include "tpudrv.h" |
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123 #include "memif/mem.h" |
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124 #include "clkm/clkm.h" |
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125 #include "inth/inth.h" |
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126 |
267
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127 #if (OP_L1_STANDALONE == 1) |
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128 #include "uart/serialswitch_core.h" |
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129 #else |
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130 #include "uart/serialswitch.h" |
265
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131 #endif |
267
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132 #include "uart/traceswitch.h" |
265
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133 |
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134 |
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135 #include "dma/dma.h" |
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136 #include "rhea/rhea_arm.h" |
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137 |
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138 #include "ulpd/ulpd.h" |
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139 |
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140 #if (OP_L1_STANDALONE == 0) |
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141 #define TIMER_RESET_VALUE (0xFFFF) |
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142 |
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143 /* |
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144 * These constants define the number of ticks per TDMA when timer 0 |
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145 * is set to pre-scale=0 and the upper limit in percent of TICKS_PER_TDMA |
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146 * for the execution of synchronous layer 1. |
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147 */ |
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148 #define TICKS_PER_TDMA (1875) |
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149 #define LIMIT_FOR_L1_SYNC (80) |
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150 #endif |
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151 |
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152 #if (PSP_STANDALONE == 0) |
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153 #if (OP_L1_STANDALONE == 0) |
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154 extern void ffs_main_init(void); |
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155 extern void create_tasks(void); |
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156 #if TI_NUC_MONITOR == 1 |
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157 extern void ti_nuc_monitor_tdma_action( void ); |
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158 #endif |
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159 |
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160 #if WCP_PROF == 1 |
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161 #if PRF_CALIBRATION == 1 |
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162 extern NU_HISR prf_CalibrationHISR; |
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163 #endif |
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164 #endif |
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165 |
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166 #else |
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167 void l1ctl_pgm_clk32(UWORD32 nb_hf, UWORD32 nb_32khz); |
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168 extern void L1_trace_string(char *s); |
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169 #endif /* (OP_L1_STANDALONE) */ |
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170 #endif |
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171 |
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172 #if (OP_L1_STANDALONE == 1) |
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173 #if ((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==7) || TESTMODE) |
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174 #include "uart/uart.h" |
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175 /* |
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176 * Serial Configuration set up. |
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177 */ |
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178 |
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179 extern char ser_cfg_info[NUMBER_OF_TR_UART]; |
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180 #include "rvt_gen.h" |
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181 extern T_RVT_USER_ID trace_id; |
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182 #endif |
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183 #endif /* (OP_L1_STANDALONE == 1) */ |
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184 |
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185 /* |
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186 * Serial Configuration set up. |
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187 */ |
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188 |
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189 /* |
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190 ** One config is: |
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191 ** {XXX_BT_HCI, // Bluetooth HCI |
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192 ** XXX_FAX_DATA, // Fax/Data AT-Cmd |
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193 ** XXX_TRACE, // L1/Riviera Trace Mux |
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194 ** XXX_TRACE}, // Trace PS |
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195 ** |
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196 ** with XXX being DUMMY, UART_IRDA or UART_MODEM |
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197 */ |
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198 |
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199 #if ((((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==7) ||\ |
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200 (TESTMODE)) && (OP_L1_STANDALONE == 1)) || (OP_L1_STANDALONE == 0)) |
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201 #if (OP_L1_STANDALONE == 1) |
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202 static T_AppliSerialInfo appli_ser_cfg_info = |
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203 #else |
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204 T_AppliSerialInfo appli_ser_cfg_info = |
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205 #endif /* OP_L1_STANDALONE */ |
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206 { |
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207 #ifdef BTEMOBILE |
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208 #ifdef BT_UART_USED_MODEM |
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209 {UART_MODEM_BT_HCI, |
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210 DUMMY_FAX_DATA, |
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211 UART_IRDA_TRACE, |
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212 DUMMY_TRACE}, // default config (Bluetooth on Modem) - 0x014A |
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213 #else |
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214 {UART_IRDA_TRACE, |
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215 DUMMY_FAX_DATA, |
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216 UART_MODEM_TRACE, |
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217 DUMMY_TRACE}, // default config (Bluetooth on IrDa) - 0x0249 |
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218 #endif // BT_UART_USED_MODEM |
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219 #else // BTEMOBILE |
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220 {DUMMY_BT_HCI, |
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221 UART_MODEM_FAX_DATA, |
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222 UART_IRDA_TRACE, |
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223 DUMMY_TRACE}, // default config = 0x0168 |
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224 #endif |
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225 #ifdef BTEMOBILE |
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226 12, // 12 serial config allowed |
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227 #else // BTEMOBILE |
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228 9, // 9 serial config allowed |
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229 #endif |
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230 { |
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231 // Configs with Condat Panel only |
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232 {DUMMY_BT_HCI, |
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233 DUMMY_FAX_DATA, |
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234 DUMMY_TRACE, |
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235 UART_IRDA_TRACE}, // 0x1048 |
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236 {DUMMY_BT_HCI, |
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237 DUMMY_FAX_DATA, |
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238 DUMMY_TRACE, |
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239 UART_MODEM_TRACE}, // 0x2048 |
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240 // Configs with L1/Riviera Trace only |
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241 {DUMMY_BT_HCI, |
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242 DUMMY_FAX_DATA, |
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243 UART_IRDA_TRACE, |
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244 DUMMY_TRACE}, // 0x0148 |
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245 {DUMMY_BT_HCI, |
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246 DUMMY_FAX_DATA, |
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247 UART_MODEM_TRACE, |
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248 DUMMY_TRACE}, // 0x0248 |
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249 // Configs with AT-Cmd only |
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250 {DUMMY_BT_HCI, |
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251 UART_MODEM_FAX_DATA, |
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252 DUMMY_TRACE, |
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253 DUMMY_TRACE}, // 0x0068 |
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254 // Configs with Condat Panel and L1/Riviera Trace |
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255 {DUMMY_BT_HCI, |
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256 DUMMY_FAX_DATA, |
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257 UART_MODEM_TRACE, |
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258 UART_IRDA_TRACE}, // 0x1248 |
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259 {DUMMY_BT_HCI, |
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260 DUMMY_FAX_DATA, |
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261 UART_IRDA_TRACE, |
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262 UART_MODEM_TRACE}, // 0x2148 |
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263 // Configs with Condat Panel and AT-Cmd |
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264 {DUMMY_BT_HCI, |
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265 UART_MODEM_FAX_DATA, |
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266 DUMMY_TRACE, |
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267 UART_IRDA_TRACE}, // 0x1068 |
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268 #ifdef BTEMOBILE |
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269 // Configs with L1/Riviera Trace and Bluetooth HCI |
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270 {UART_IRDA_BT_HCI, |
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271 DUMMY_FAX_DATA, |
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272 UART_MODEM_TRACE, |
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273 DUMMY_TRACE}, // 0x0249 |
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274 {UART_MODEM_BT_HCI, |
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275 DUMMY_FAX_DATA, |
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276 UART_IRDA_TRACE, |
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277 DUMMY_TRACE}, // 0x014A |
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278 // Configs with AT-Cmd and Bluetooth HCI |
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279 {UART_IRDA_BT_HCI, |
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280 UART_MODEM_FAX_DATA, |
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281 DUMMY_TRACE, |
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282 DUMMY_TRACE}, // 0x0069 |
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283 #endif // BTEMOBILE |
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284 // Configs with L1/Riviera Trace and AT-Cmd |
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285 {DUMMY_BT_HCI, |
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286 UART_MODEM_FAX_DATA, |
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287 UART_IRDA_TRACE, |
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288 DUMMY_TRACE} // 0x0168 |
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289 } |
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290 }; |
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291 #endif /* (TRACE_TYPE ...) || (OP_L1_STANDALONE == 0) */ |
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292 |
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293 |
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294 /* |
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295 * Init_Target |
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296 * |
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297 * Performs low-level HW Initialization. |
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298 */ |
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299 void Init_Target(void) |
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300 { |
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301 #if (BOARD == 5) |
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302 #define WS_ROM (1) |
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303 #define WS_RAM (1) |
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304 #define WS_APIF (1) |
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305 #define WS_CS2 (7) /* LCD on EVA3. */ |
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306 #define WS_CS0 (7) /* DUART on EVA3. UART16750 and latch on A-Sample. */ |
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307 #define WS_CS1 (7) /* LCD on A-Sample. */ |
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308 |
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309 IQ_InitWaitState (WS_ROM, WS_RAM, WS_APIF, WS_CS2, WS_CS0, WS_CS1); |
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310 IQ_InitClock (2); /* Internal clock division factor. */ |
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311 |
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312 IQ_MaskAll (); /* Mask all interrupts. */ |
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313 IQ_SetupInterrupts (); /* IRQ priorities. */ |
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314 |
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315 TM_DisableWatchdog (); |
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316 |
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317 /* |
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318 * Reset all TSP and DBG fdefault values |
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319 */ |
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320 |
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321 AI_ResetTspIO (); |
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322 AI_ResetDbgReg (); |
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323 AI_ResetIoConfig (); |
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324 |
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325 /* |
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326 * Warning! The external reset signal is connected to the Omega and the |
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327 * external device. If the layer 1 is used its initialization removes |
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328 * the external reset. If the application does not use the layer 1 |
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329 * you must remove the external reset (bit 2 of the reset control |
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330 * register 0x505808). |
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331 */ |
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332 |
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333 AI_ResetTspIO(); |
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334 AI_ResetDbgReg(); |
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335 AI_ResetIoConfig(); |
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336 |
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337 /* |
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338 * Configure all IOs (see RD300 specification). |
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339 */ |
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340 |
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341 AI_ConfigBitAsInput (1); |
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342 AI_EnableBit (1); |
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343 |
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344 AI_ConfigBitAsOutput (2); |
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345 AI_EnableBit (2); |
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346 |
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347 AI_ConfigBitAsInput (11); |
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348 AI_EnableBit (11); |
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349 |
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350 AI_ConfigBitAsOutput (13); |
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351 AI_EnableBit (13); |
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352 |
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353 AI_Power (1); /* Maintain power supply. */ |
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354 |
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355 #elif (BOARD == 6) || (BOARD == 7) || (BOARD == 8) || (BOARD == 9) || \ |
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356 (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45) || \ |
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357 (BOARD == 35) || (BOARD == 46) || (BOARD == 70) || (BOARD == 71) |
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358 |
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359 #if (PSP_STANDALONE == 0) |
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360 // RIF/SPI rising edge clock for ULYSSE |
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361 //-------------------------------------------------- |
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362 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)|| (ANLG_FAM == 11)) |
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363 #if ((CHIPSET >= 3)) |
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364 #if (CHIPSET == 12) |
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365 F_CONF_RIF_RX_RISING_EDGE; |
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366 F_CONF_SPI_RX_RISING_EDGE; |
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367 #elif (CHIPSET == 15) |
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368 //do the DRP init here for Locosto |
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369 #if (L1_DRP == 1) |
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370 // drp_power_on(); This should be done after the script is downloaded. |
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371 #endif |
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372 #else |
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373 #if (BOARD==35) |
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374 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x2000; |
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375 #else |
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376 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x6000; |
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377 #endif /* (BOARD == 35) */ |
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378 #endif |
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379 #endif |
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380 #endif /* ANLG(ANALOG)) */ |
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381 |
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382 #if (OP_L1_STANDALONE == 1) |
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383 #if (BOARD == 40) || (BOARD == 41) || \ |
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384 (BOARD == 42) || (BOARD == 43) || (BOARD == 45) |
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385 // enable 8 Ohm amplifier for audio on D-sample |
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386 AI_ConfigBitAsOutput (1); |
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387 AI_SetBit(1); |
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388 #elif (BOARD == 70) || (BOARD == 71) |
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389 //Locosto I-sample or UPP costo board.BOARD |
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390 // Initialize the ARMIO bits as per the I-sample spec |
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391 // FIXME |
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392 #endif |
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393 #endif /* (OP_L1_STANDALONE == 1) */ |
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394 #endif /* PSP_STANDALONE ==0 */ |
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395 |
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396 // Watchdog |
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397 //-------------------------------------------------- |
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398 TM_DisableWatchdog(); /* Disable Watchdog */ |
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399 #if (CHIPSET == 12) || (CHIPSET == 15) |
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400 TM_SEC_DisableWatchdog(); |
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401 #endif |
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402 |
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403 #if ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)) |
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404 |
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405 #if (CHIPSET == 12) |
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406 |
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407 #if 0 /* example of configuration for DMA debug */ |
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408 #if (BOARD == 6) /* debug on EVA 4 , GPO2 must not be changed */ |
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409 |
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410 /* TPU_FRAME, NMIIT, IACKn */ |
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411 F_DBG_IRQ_CONFIG(C_DBG_IRQ_IRQ4|C_DBG_IRQ_NMIIT|C_DBG_IRQ_IACKN); |
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412 |
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413 /* NDMA_REQ_VIEW1, NDMA_REQ_VIEW0, DMA_V(1), DMA_S(1), DMAREQ_P1(3:0)*/ |
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414 F_DBG_DMA_P1_NDFLASH_CONFIG(C_DBG_DMA_P1_NDFLASH_NDMA_REQ_VIEW_1 | |
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415 C_DBG_DMA_P1_NDFLASH_NDMA_REQ_VIEW_0 | |
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416 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_3 | |
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417 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_2 | |
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418 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_1 | |
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419 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_0 | |
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420 C_DBG_DMA_P1_NDFLASH_DMA_REQ_S_1 | |
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421 C_DBG_DMA_P1_NDFLASH_DMA_REQ_V1 ); |
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422 /* DMA_REQ_S(2)*/ |
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|
423 F_DBG_DMA_P2_CONFIG(C_DBG_DMA_P2_DMA_REQ_S2); |
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parents:
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|
424 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
425 /* DMA_CLK_REQ, BRIDGE_CLK */ |
0aa748b6413a
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parents:
diff
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|
426 F_DBG_CLK1_CONFIG(C_DBG_CLK1_DMA_CLK_REQ | |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
427 C_DBG_CLK1_BRIDGE_CLK ); |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
428 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
429 /* XIO_nREADY */ |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
430 F_DBG_IMIF_CONFIG(C_DBG_IMIF_XIO_NREADY_MEM); |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
431 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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432 /* DSP_nIRQ_VIEW1, DSP_nIRQ_VIEW0, BRIDGE_EN */ |
0aa748b6413a
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|
433 F_DBG_KB_USIM_SHD_CONFIG(C_DBG_KB_USIM_SHD_DSP_NIRQ_VIEW_1 | |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
434 C_DBG_KB_USIM_SHD_DSP_NIRQ_VIEW_0 | |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
435 C_DBG_KB_USIM_SHD_BRIDGE_EN ); |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
436 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
437 /* RHEA_nREADY , RHEA_nSTROBE */ |
0aa748b6413a
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parents:
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|
438 F_DBG_USIM_CONFIG(C_DBG_USIM_RHEA_NSTROBE | |
0aa748b6413a
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parents:
diff
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|
439 C_DBG_USIM_RHEA_NREADY ); |
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parents:
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|
440 |
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441 /* XIO_STROBE */ |
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442 F_DBG_MISC2_CONFIG(C_DBG_MISC2_X_IOSTRBN); |
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443 |
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Mychaela Falconia <falcon@freecalypso.org>
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444 /* DMA_CLK_REQ */ |
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parents:
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|
445 F_DBG_CLK2_CONFIG(C_DBG_CLK2_DMA_CLK_REQ2); |
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parents:
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|
446 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
447 /* DSP_IRQ_SEL0=DMA, DSP_IRQ_SEL1=DMA, DMA_REQ_SEL0=RIF_RX, DMA_REQ_SEL1=RIF_RX */ |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
448 F_DBG_VIEW_CONFIG(0,0,C_DBG_DSP_INT_DMA, |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
449 C_DBG_DSP_INT_DMA, |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
450 C_DMA_CHANNEL_RIF_RX, |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
451 C_DMA_CHANNEL_RIF_RX); |
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parents:
diff
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|
452 |
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parents:
diff
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|
453 #endif /* (BOARD == 6) */ |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
454 #endif /* DMA debug example */ |
0aa748b6413a
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parents:
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|
455 #else |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
456 /* |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
457 * Configure ASIC in order to output the DPLL and ARM clock |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
458 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
459 // (*( volatile UWORD16* )(0xFFFEF008)) = 0x8000; // DPLL |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
460 // (*( volatile UWORD16* )(0xFFFEF00E)) = 0x0004; // ARM clock |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
461 // (*( volatile UWORD16* )(0xfffef004)) = 0x0600; // DSP clock + nIACK |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
462 #endif /* (CHIPSET == 12) || CHIPSET == 15*/ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
463 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
464 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
465 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
466 * Enable/Disable of clock switch off for INTH, TIMER, BRIDGE and DPLL modules |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
467 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
468 // IRQ, Timer and bridge may SLEEP |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
469 // In first step, same configuration as SAMSON |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
470 //-------------------------------------------------- |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
471 #if (CHIPSET == 12) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
472 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_TIMER_DIS | CLKM_BRIDGE_DIS | CLKM_DPLL_DIS); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
473 #elif (CHIPSET == 15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
474 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_TIMER_DIS | CLKM_CPORT_EN | CLKM_BRIDGE_DIS | 0x8000 ); /* CLKM_DPLL_DIS is remove by Ranga*/ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
475 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
476 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
477 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_TIMER_DIS); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
478 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
479 // Select VTCXO input frequency |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
480 //-------------------------------------------------- |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
481 CLKM_UNUSED_VTCXO_26MHZ; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
482 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
483 // Rita RF uses 26MHz VCXO |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
484 #if (RF_FAM == 12) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
485 CLKM_USE_VTCXO_26MHZ; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
486 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
487 // Renesas RF uses 26MHz on F-sample but 13MHz on TEB |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
488 #if (RF_FAM == 43) && (BOARD == 46) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
489 CLKM_USE_VTCXO_26MHZ; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
490 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
491 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
492 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
493 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
494 // Control HOM/SAM automatic switching |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
495 //-------------------------------------------------- |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
496 *((volatile unsigned short *) CLKM_CNTL_CLK) &= ~CLKM_EN_IDLE3_FLG; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
497 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
498 /* |
269
a498108254c9
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268
diff
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|
499 * The following part has been reconstructed from disassembly. |
a498108254c9
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268
diff
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|
500 */ |
a498108254c9
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268
diff
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|
501 RHEA_INITRHEA(0,0,0xFF); |
a498108254c9
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268
diff
changeset
|
502 DPLL_INIT_BYPASS_MODE(DPLL_BYPASS_DIV_1); |
a498108254c9
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Mychaela Falconia <falcon@freecalypso.org>
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268
diff
changeset
|
503 DPLL_INIT_DPLL_CLOCK(DPLL_LOCK_DIV_1, 8); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
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268
diff
changeset
|
504 CLKM_InitARMClock(0x00, 2, 0); /* no low freq, no ext clock, div by 1 */ |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
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268
diff
changeset
|
505 MEM_INIT_CS0(3, MEM_DVS_16, MEM_WRITE_EN, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
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268
diff
changeset
|
506 MEM_INIT_CS1(3, MEM_DVS_16, MEM_WRITE_EN, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
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268
diff
changeset
|
507 MEM_INIT_CS2(5, MEM_DVS_16, MEM_WRITE_EN, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
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268
diff
changeset
|
508 MEM_INIT_CS3(3, MEM_DVS_16, MEM_WRITE_EN, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
509 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
510 MEM_INIT_CS6(0, MEM_DVS_32, MEM_WRITE_EN, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
511 MEM_INIT_CS7(0, MEM_DVS_32, MEM_WRITE_DIS, 0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
512 RHEA_INITAPI(0,1); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
513 RHEA_INITARM(0,0); |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
514 DPLL_SET_PLL_ENABLE; |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
515 |
a498108254c9
init.c: Init_Target() reconstructed, perfect match to original object
Mychaela Falconia <falcon@freecalypso.org>
parents:
268
diff
changeset
|
516 /* |
265
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
517 * Disable and Clear all pending interrupts |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
518 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
519 #if (CHIPSET == 12) || (CHIPSET == 15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
520 F_INTH_DISABLE_ALL_IT; // MASK all it |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
521 F_INTH2_VALID_NEXT(C_INTH_IRQ); // reset current IT in INTH2 IRQ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
522 F_INTH_VALID_NEXT(C_INTH_IRQ); // reset current IT in INTH IRQ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
523 F_INTH_VALID_NEXT(C_INTH_FIQ); // reset current IT in INTH FIQ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
524 F_INTH_RESET_ALL_IT; // reset all IRQ/FIQ source |
0aa748b6413a
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525 #else |
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526 INTH_DISABLEALLIT; |
269
a498108254c9
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268
diff
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|
527 #if 0 /* not present in our reference binary object */ |
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268
diff
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528 INTH_RESETALLIT; |
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529 #endif |
265
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530 INTH_CLEAR; /* reset IRQ/FIQ source */ |
0aa748b6413a
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parents:
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|
531 #endif |
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parents:
diff
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|
532 |
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Mychaela Falconia <falcon@freecalypso.org>
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|
533 // INTH |
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|
534 //-------------------------------------------------- |
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|
535 #if (CHIPSET == 12) || (CHIPSET == 15) |
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parents:
diff
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|
536 #if (GSM_IDLE_RAM != 0) |
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diff
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|
537 f_inth_setup((T_INTH_CONFIG *)a_inth_config_idle_ram); // setup configuration IT handlers |
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parents:
diff
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|
538 #else |
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parents:
diff
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|
539 f_inth_setup((T_INTH_CONFIG *)a_inth_config); // setup configuration IT handlers |
0aa748b6413a
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parents:
diff
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|
540 #endif |
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parents:
diff
changeset
|
541 #else |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
542 IQ_SetupInterrupts(); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
543 #endif |
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parents:
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|
544 |
0aa748b6413a
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parents:
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|
545 |
0aa748b6413a
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parents:
diff
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|
546 #if (CHIPSET == 12) || (CHIPSET == 15) |
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parents:
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|
547 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
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parents:
diff
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|
548 |
0aa748b6413a
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parents:
diff
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|
549 f_dma_global_parameter_set((T_DMA_TYPE_GLOBAL_PARAMETER *)&d_dma_global_parameter); |
0aa748b6413a
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parents:
diff
changeset
|
550 #endif |
0aa748b6413a
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diff
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|
551 f_dma_channel_allocation_set(C_DMA_CHANNEL_0, C_DMA_CHANNEL_DSP); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
552 #if (OP_L1_STANDALONE == 1) |
0aa748b6413a
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parents:
diff
changeset
|
553 f_dma_global_parameter_set((T_DMA_TYPE_GLOBAL_PARAMETER *)&d_dma_global_parameter); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
554 f_dma_channel_allocation_set(C_DMA_CHANNEL_0, C_DMA_CHANNEL_DSP); |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
555 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
556 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
557 #else |
0aa748b6413a
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parents:
diff
changeset
|
558 // DMA |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
559 //-------------------------------------------------- |
0aa748b6413a
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parents:
diff
changeset
|
560 // channel0 = Arm, channel1 = Lead, channel2 = forced to Arm, channel3=forced to Arm, dma_burst = 0001, priority = same |
0aa748b6413a
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parents:
diff
changeset
|
561 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
562 DMA_ALLOCDMA(1,0,1,1); // Channel 1 used by DSP with RIF RX |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
563 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
564 #endif |
0aa748b6413a
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parents:
diff
changeset
|
565 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
566 /* CHIPSET = 4 or 7 or 8 or 10 or 11 or 12 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
567 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
568 #else |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
569 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
570 // RHEA Bridge |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
571 //-------------------------------------------------- |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
572 // ACCES_FAC_0 = 0, ACCES_FAC_1 = 0 ,TIMEOUT = 0x7F |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
573 RHEA_INITRHEA(0,0,0x7F); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
574 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
575 #if (CHIPSET == 6) |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
576 // WS_H = 1 , WS_L = 15 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
577 RHEA_INITAPI(1,15); // should be 0x01E1 for 65 Mhz |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
578 #else |
0aa748b6413a
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parents:
diff
changeset
|
579 // WS_H = 0 , WS_L = 7 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
580 RHEA_INITAPI(0,7); // should be 0x0101 for 65 Mhz |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
581 #endif |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
582 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
583 // Write_en_0 = 0 , Write_en_1 = 0 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
584 RHEA_INITARM(0,0); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
585 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
586 // INTH |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
587 //-------------------------------------------------- |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
588 INTH_DISABLEALLIT; // MASK all it |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
589 INTH_CLEAR; // reset IRQ/FIQ source |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
590 IQ_SetupInterrupts(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
591 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
592 // DMA |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
593 //-------------------------------------------------- |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
594 // channel0 = Arm, channel1 = Lead, dma_burst = 0001, priority = same |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
595 DMA_ALLOCDMA(1,0,1,1); // should be 0x25 (channel 1 = lead) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
596 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
597 #if (CHIPSET == 6) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
598 // Memory WS configuration for ULYSS/G1 (26 Mhz) board |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
599 //----------------------------------------------------- |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
600 MEM_INIT_CS2(2,MEM_DVS_16,MEM_WRITE_EN,0); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
601 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
602 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
603 // CLKM |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
604 //-------------------------------------------------- |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
605 CLKM_InitARMClock(0x00, 2); /* no low freq, no ext clock, div by 1 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
606 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
607 #if (CHIPSET == 6) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
608 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_BRIDGE_DIS | CLKM_TIMER_DIS | CLKM_VTCXO_26); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
609 #else |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
610 CLKM_INITCNTL(CLKM_IRQ_DIS | CLKM_BRIDGE_DIS | CLKM_TIMER_DIS); |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
611 #endif |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
612 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
613 #endif /* CHIPSET = 4 or 7 or 8 or 10 or 11 or 12 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
614 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
615 // Freeze ULPD timer .... |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
616 //-------------------------------------------------- |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
617 *((volatile SYS_UWORD16 *) ULDP_GSM_TIMER_INIT_REG ) = 0; |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
618 *((volatile SYS_UWORD16 *) ULDP_GSM_TIMER_CTRL_REG ) = TPU_FREEZE; |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
619 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
620 // reset INC_SIXTEEN and INC_FRAC |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
621 //-------------------------------------------------- |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
622 #if (OP_L1_STANDALONE == 1) |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
623 l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE,DEFAULT_32KHZ_VALUE); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
624 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
625 ULDP_INCSIXTEEN_UPDATE(132); //32768.29038 =>132, 32500 => 133 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
626 // 26000 --> 166 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
627 ULDP_INCFRAC_UPDATE(15840); //32768.29038 =>15840, 32500 => 21845 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
628 // 26000 --> 43691 |
0aa748b6413a
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629 #endif /* OP_L1_STANDALONE */ |
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630 |
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631 // program ULPD WAKE-UP .... |
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632 //================================================= |
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633 #if (CHIPSET == 2) |
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634 *((volatile SYS_UWORD16 *)ULDP_SETUP_FRAME_REG) = SETUP_FRAME; // 2 frame |
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635 *((volatile SYS_UWORD16 *)ULDP_SETUP_VTCXO_REG) = SETUP_VTCXO; // 31 periods |
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636 *((volatile SYS_UWORD16 *)ULDP_SETUP_SLICER_REG) = SETUP_SLICER; // 31 periods |
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637 *((volatile SYS_UWORD16 *)ULDP_SETUP_CLK13_REG) = SETUP_CLK13; // 31 periods |
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638 #else |
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639 *((volatile SYS_UWORD16 *)ULDP_SETUP_FRAME_REG) = SETUP_FRAME; // 3 frames |
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640 *((volatile SYS_UWORD16 *)ULDP_SETUP_VTCXO_REG) = SETUP_VTCXO; // 0 periods |
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641 *((volatile SYS_UWORD16 *)ULDP_SETUP_SLICER_REG) = SETUP_SLICER; // 31 periods |
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642 *((volatile SYS_UWORD16 *)ULDP_SETUP_CLK13_REG) = SETUP_CLK13; // 31 periods |
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643 *((volatile SYS_UWORD16 *)ULPD_SETUP_RF_REG) = SETUP_RF; // 31 periods |
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644 #endif |
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|
645 |
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|
646 // Set Gauging versus HF (PLL) |
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|
647 //================================================= |
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|
648 ULDP_GAUGING_SET_HF; // Enable gauging versus HF |
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|
649 ULDP_GAUGING_HF_PLL; // Gauging versus PLL |
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|
650 |
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651 // current supply for quartz oscillation |
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652 //================================================= |
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653 #if (OP_L1_STANDALONE == 1) |
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654 #if ((CHIPSET != 9) && (CHIPSET != 12) && (CHIPSET !=15)) // programming model changed for Ulysse C035, stay with default value |
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655 *(volatile SYS_UWORD16 *)QUARTZ_REG = 0x27; |
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656 #endif |
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657 #else |
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658 #if ((BOARD == 6) || (BOARD == 8) || (BOARD == 9) || (BOARD == 35) || (BOARD == 40) || (BOARD == 41)) |
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659 *((volatile SYS_UWORD16 *)QUARTZ_REG) = 0x27; |
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660 #elif (BOARD == 7) |
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661 *((volatile SYS_UWORD16 *)QUARTZ_REG) = 0x24; |
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|
662 #endif |
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|
663 #endif /* OP_L1_STANDALONE */ |
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|
664 |
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|
665 // stop Gauging if any (debug purpose ...) |
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|
666 //-------------------------------------------------- |
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|
667 if ( *((volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG) & ULDP_GAUGING_EN) |
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parents:
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|
668 { |
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|
669 volatile UWORD32 j; |
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|
670 ULDP_GAUGING_STOP; /* Stop the gauging */ |
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|
671 /* wait for gauging it*/ |
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|
672 // one 32khz period = 401 periods of 13Mhz |
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|
673 for (j=1; j<50; j++); |
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|
674 while (! (* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_IT_GAUGING); |
0aa748b6413a
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|
675 } |
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|
676 |
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diff
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|
677 #if (OP_L1_STANDALONE == 0) |
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diff
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|
678 AI_ClockEnable (); |
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|
679 |
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|
680 #if (BOARD == 7) |
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|
681 // IOs configuration of the B-Sample in order to optimize the power consumption |
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diff
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|
682 AI_InitIOConfig(); |
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|
683 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
684 // Set LPG instead of DSR_MODEM |
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diff
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|
685 *((volatile SYS_UWORD16 *) ASIC_CONF) |= 0x40; |
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|
686 // Reset the PERM_ON bit of LCR_REG |
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|
687 *((volatile SYS_UWORD16 *) MEM_LPG) &= ~(0x80); |
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|
688 #elif ((BOARD == 8) || (BOARD == 9)) |
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diff
changeset
|
689 // IOs configuration of the C-Sample in order to optimize the power consumption |
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diff
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|
690 AI_InitIOConfig(); |
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|
691 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
692 // set the debug latch to 0x00. |
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src/cs/system/Main/init.c: initial import from LoCosto source
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|
693 *((volatile SYS_UWORD8 *) 0x2800000) = 0x00; |
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|
694 #elif ((BOARD == 35) || (BOARD == 46)) |
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diff
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|
695 AI_InitIOConfig(); |
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diff
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|
696 // CSMI INTERFACE |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
697 // Initialize CSMI clients for GSM control |
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src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
698 // and Fax/Data services |
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diff
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|
699 CSMI_Init(); |
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diff
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|
700 GC_Initialize(); // GSM control initialization |
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diff
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|
701 CU_Initialize(); // Trace initialization |
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diff
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|
702 CF_Initialize(); // Fax/Data pre-initialization |
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|
703 #elif ((BOARD == 40) || (BOARD == 41)) |
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diff
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|
704 // IOs configuration of the D-Sample in order to optimize the power consumption |
0aa748b6413a
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parents:
diff
changeset
|
705 AI_InitIOConfig(); |
0aa748b6413a
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diff
changeset
|
706 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
707 #ifdef BTEMOBILE |
0aa748b6413a
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diff
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|
708 // Reset BT chip by toggling the Island's nRESET_OUT signal |
0aa748b6413a
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parents:
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|
709 *((volatile SYS_UWORD16 *) 0xFFFFFD04) |= 0x04; |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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|
710 *((volatile SYS_UWORD16 *) 0xFFFFFD04) &= ~(0x4); |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
711 #endif |
0aa748b6413a
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diff
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|
712 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
713 // set the debug latch to 0x0000. |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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|
714 *((volatile SYS_UWORD16 *) 0x2700000) = 0x0000; |
0aa748b6413a
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diff
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|
715 #endif // BOARD |
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diff
changeset
|
716 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
717 // Enable HW Timers 1 & 2 |
0aa748b6413a
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diff
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|
718 TM_EnableTimer (1); |
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diff
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|
719 TM_EnableTimer (2); |
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diff
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|
720 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
721 #endif /* (OP_L1_STANDALONE == 0) */ |
0aa748b6413a
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diff
changeset
|
722 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
723 #endif /* #if (BOARD == 5) */ |
0aa748b6413a
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|
724 } |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
725 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
726 /* |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
727 * Init_Drivers |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
728 * |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
729 * Performs Drivers Initialization. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
730 */ |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
731 void Set_Switch_ON_Cause(void); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
732 void Init_Drivers(void) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
733 { |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
734 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 #if (CHIPSET==15) |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
736 bspI2c_init(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
737 bspTwl3029_init(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
738 |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
739 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
740 Set_Switch_ON_Cause(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
741 #endif |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
742 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
743 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
744 /* Turn on DRP We will make VRMCC to device group Modem |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
745 * And Switch it on. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
746 */ |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
747 bspTwl3029_Power_setDevGrp(NULL,BSP_TWL3029_POWER_VRMMC,BSP_TWL3029_POWER_DEV_GRP_MODEM); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
748 wait_ARM_cycles(convert_nanosec_to_cycles(100000*2)); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
749 bspTwl3029_Power_enable(NULL,BSP_TWL3029_POWER_VRMMC,BSP_TWL3029_POWER_STATE_ACTIVE); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
750 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
751 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
752 #if (CHIPSET!=15) |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
753 #if ABB_SEMAPHORE_PROTECTION |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
754 // Create the ABB semaphore |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
755 ABB_Sem_Create(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
756 #endif // SEMAPHORE_PROTECTION |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
757 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
758 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
759 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
760 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
761 * Initialize FFS invoking restore procedure by MPU-S |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
762 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
763 #if ((BOARD == 35) || (BOARD == 46)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
764 GC_FfsRestore(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
765 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
766 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
767 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
768 * FFS main initialization. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
769 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
770 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
771 ffs_main_init(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
772 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
773 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
774 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
775 * Initialize Riviera manager and create tasks thanks to it. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
776 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
777 #if (CHIPSET!=15) || (REMU==0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 rvf_init(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
779 rvm_init(); /* A-M-E-M-D-E-D! */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
780 create_tasks(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
782 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
783 * SIM Main Initialization. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
784 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
785 #if (CHIPSET!=15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
786 SIM_Initialize (); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
787 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
788 bspUicc_bootInit(); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
789 #endif |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
790 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
791 } |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
792 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
793 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
794 * Init_Serial_Flows |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
795 * |
0aa748b6413a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
796 * Performs Serialswitch + related serial data flows initialization. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
797 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
798 void Init_Serial_Flows (void) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
799 { |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
800 #if (OP_L1_STANDALONE == 0) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
801 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
802 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
803 * Initialize Serial Switch module. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
804 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
805 #if ((BOARD==35) || (BOARD == 46)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
806 SER_InitSerialConfig (GC_GetSerialConfig()); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
807 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
808 SER_InitSerialConfig (&appli_ser_cfg_info); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
809 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
810 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
811 * Then Initialize the Serial Data Flows and the associated UARTs: |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
812 * - G2-3 Trace if GSM/GPRS Protocol Stack |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
813 * - AT-Cmd/Fax & Data Flow |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
814 * |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
815 * Layer1/Riviera Trace Flow and Bluetooth HCI Flow are initialized |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
816 * by the appropriate SW Entities. |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
817 * |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
818 * G2-3 Trace => No more Used |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
819 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
820 SER_tr_Init(SER_PROTOCOL_STACK, TR_BAUD_38400, NULL); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
821 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
822 /* |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
823 * Fax & Data / AT-Command Interpreter Serial Data Flow Initialization |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
824 */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
825 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
826 #if ((BOARD != 35) && (BOARD != 46)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
827 (void) SER_fd_Initialize (); |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
828 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
829 #else /* OP_L1_STANDALONE */ |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
830 |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
831 #if (TESTMODE || (TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==6) || (TRACE_TYPE==7)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
832 #if ((BOARD == 35) || (BOARD == 46)) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
833 ser_cfg_info[UA_UART_0] = '0'; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
834 #else |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
835 ser_cfg_info[UA_UART_0] = 'G'; |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
836 #endif |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
837 #if (CHIPSET !=15) |
0aa748b6413a
src/cs/system/Main/init.c: initial import from LoCosto source
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
838 ser_cfg_info[UA_UART_1] = 'R'; // Riviear Demux on UART MODEM |
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839 #else |
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840 ser_cfg_info[UA_UART_0] = 'R'; // Riviear Demux on UART MODEM |
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841 #endif |
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842 |
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843 /* init Uart Modem */ |
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844 SER_InitSerialConfig (&appli_ser_cfg_info); |
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845 |
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846 #if TESTMODE || (TRACE_TYPE == 1) || (TRACE_TYPE == 7) |
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847 SER_tr_Init (SER_LAYER_1, TR_BAUD_115200, rvt_activate_RX_HISR); |
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848 |
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849 rvt_register_id("OTHER",&trace_id,(RVT_CALLBACK_FUNC)NULL); |
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850 #else |
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851 SER_tr_Init (SER_LAYER_1, TR_BAUD_38400, NULL); |
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852 #endif |
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853 |
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854 L1_trace_string(" \n\r"); |
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855 |
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856 #endif /* TRACE_TYPE */ |
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857 |
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858 #endif /* OP_L1_STANDALONE */ |
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859 } |
270
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860 |
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861 /* |
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862 * Init_Unmask_IT |
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863 * |
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864 * Unmask all used interrupts. |
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865 */ |
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866 void Init_Unmask_IT (void) |
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867 { |
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868 IQ_Unmask(IQ_FRAME); |
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869 IQ_Unmask(IQ_UART_IRDA_IT); |
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870 IQ_Unmask(IQ_UART_IT); |
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871 IQ_Unmask(IQ_ARMIO); |
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872 #if (L1_DYN_DSP_DWNLD == 1) |
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873 IQ_Unmask(IQ_API); |
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874 #endif |
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875 } |