FreeCalypso > hg > fc-small-hw
annotate lcdtest1/schem+bom/schem.v @ 77:4c5675c79555
lunalcd3.pcb: add orientation marker to SW1
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 18 Nov 2021 07:40:13 +0000 |
parents | 0f9bdd60ce50 |
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1 module board (); |
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2 |
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3 wire GND, P_5V, P_3V3; |
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4 wire [7:0] DB; |
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5 wire RD, WR, RS, CS, RESET; |
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6 wire [1:3] LEDK; |
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7 |
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8 conn_36pin_plus2 fpc ( .pin_1(DB[7]), |
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9 .pin_2(DB[6]), |
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10 .pin_3(DB[5]), |
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11 .pin_4(DB[4]), |
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12 .pin_5(DB[3]), |
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13 .pin_6(DB[2]), |
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14 .pin_7(DB[1]), |
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15 .pin_8(DB[0]), |
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16 .pin_9(GND), |
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17 .pin_10(GND), /* unused lower data bus */ |
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18 .pin_11(GND), /* unused lower data bus */ |
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19 .pin_12(GND), /* unused lower data bus */ |
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20 .pin_13(GND), /* unused lower data bus */ |
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21 .pin_14(GND), /* unused lower data bus */ |
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22 .pin_15(GND), /* unused lower data bus */ |
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23 .pin_16(GND), /* unused lower data bus */ |
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24 .pin_17(GND), /* unused lower data bus */ |
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25 .pin_18(P_3V3), /* IOVCC */ |
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26 .pin_19(P_3V3), /* VCI */ |
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27 .pin_20(RD), |
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28 .pin_21(WR), |
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29 .pin_22(RS), |
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30 .pin_23(CS), |
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31 .pin_24(RESET), |
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32 .pin_25(P_3V3), /* IM0 tied high */ |
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33 .pin_26(GND), |
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34 .pin_27(P_5V), /* LEDA */ |
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35 .pin_28(LEDK[1]), |
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36 .pin_29(LEDK[2]), |
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37 .pin_30(LEDK[3]), |
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38 /* the remaining pins are NC */ |
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39 .pin_31(), |
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40 .pin_32(), |
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41 .pin_33(), |
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42 .pin_34(), |
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43 .pin_35(), |
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44 .pin_36(), |
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45 /* ground the two mounting pads */ |
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46 .pin_37(GND), |
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47 .pin_38(GND) |
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48 ); |
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49 |
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50 resistor R1 (LEDK[1], GND); |
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51 resistor R2 (LEDK[2], GND); |
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52 resistor R3 (LEDK[3], GND); |
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53 |
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54 header_13pin data (.pin_1(DB[7]), |
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55 .pin_2(DB[6]), |
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56 .pin_3(DB[5]), |
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57 .pin_4(DB[4]), |
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58 .pin_5(DB[3]), |
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59 .pin_6(DB[2]), |
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60 .pin_7(DB[1]), |
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61 .pin_8(DB[0]), |
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62 .pin_9(RD), |
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63 .pin_10(WR), |
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64 .pin_11(RS), |
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65 .pin_12(CS), |
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66 .pin_13(RESET) |
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67 ); |
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68 |
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69 header_2pin pwr_5V (.pin_1(P_5V), |
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70 .pin_2(GND) |
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71 ); |
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72 |
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73 header_2pin pwr_3V3 (.pin_1(P_3V3), |
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74 .pin_2(GND) |
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75 ); |
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76 |
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77 endmodule |