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comparison fpga/sniffer-basic/Makefile @ 18:af1a9732da1f

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FPGA build: include yosys-wrap in this repository
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 19:25:35 +0000
parents 82da4b7835b7
children e92ab75ce6a8
comparison
equal deleted inserted replaced
17:41e6026e5d1a 18:af1a9732da1f
3 PROJ= fpga 3 PROJ= fpga
4 4
5 all: ${PROJ}.bin timing.rpt 5 all: ${PROJ}.bin timing.rpt
6 6
7 ${PROJ}.json: ${VSRC} 7 ${PROJ}.json: ${VSRC}
8 yosys-wrap top $@ ${VSRC} | tee synthesis.rpt 8 ../tools/yosys-wrap top $@ ${VSRC} | tee synthesis.rpt
9 9
10 ${PROJ}.asc: ${PROJ}.json ${PCF} 10 ${PROJ}.asc: ${PROJ}.json ${PCF}
11 nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \ 11 nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \
12 --json ${PROJ}.json -l pnr.rpt 12 --json ${PROJ}.json -l pnr.rpt
13 13